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  1. #1
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    14 bit adc output to 5 bit data conversion in VHDL

    I am having 14 bit ADC data which is in 2's complement format.
    I require to convert in 5 bit format using vhdl language. What is the easiest way of doing it apart from using if then else statements comparing magnitude?
    Consider the input data to be in two cases unsigned and signed.

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    Re: 14 bit adc output to 5 bit data conversion in VHDL

    Try using resize from numeric_std on signed data type.
    https://www.csee.umbc.edu/portal/hel...meric_std.vhdl



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    Re: 14 bit adc output to 5 bit data conversion in VHDL

    Hi,

    Maybe I misunderstand..

    But if you want to generate 5 (linear. Not logarithmic like u-law, A-law) bits from a 14 bit ADC ... then just use the 5 upper bits and ignore the 9 lower significant bits.

    Klaus
    Please don´t contact me via PM, because there is no time to respond to them. No friend requests. Thank you.



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  4. #4
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    Re: 14 bit adc output to 5 bit data conversion in VHDL

    But if you want to generate 5 (linear. Not logarithmic like u-law, A-law) bits from a 14 bit ADC ... then just use the 5 upper bits and ignore the 9 lower significant bits.
    May be the question is that trivial, may be some specific coding is intended. The OP missed to ask a clear question.



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