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Digit Truncation in unsigned BCD decimal number format using vhdl

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shashwatss

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Hello,
I would like to perform a multiplication of an unsigned number with 10^-7. This implies 7 Digit truncation beyond decimal Point in BCD. I am Aware of truncation and quantization Errors and have mapped them to my acceptable Standards.
Code until now: -
Code:
Architecture RTL of xyz is

signal prefactor : std_logic_vector(63 downto 0);
signal prefactor_truncated : std_logic_vector(63 downto 0);

begin

process(clk_in)
begin
prefactor_truncated : to_unsigned(prefactor)-- the Argument multiplies with 10^-7
prefactor_truncated : <[I]logic for truncation[/I]> -- unsigned decimal BCD number after removal of last 7 digits 
end process;

end RTL;

Can someone please suggest if we can follow a similar Approach as std_logic_vector(bit req(63) downto bit_req(7)) for BCD numbers as well? If so, can you please hint towards a suitable logic that can be incorporated for the same?
Thank you
 

std_logic_vector is a bit string and doesn't imply a specific numeric representation. What's the input data format? Unsigned (binary) or BCD?
 

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