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  1. #1
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    Changing the ModelSim version that comes with Libero SoC v12.3

    I am using Microsemi Libero SoC 12.3 tool suite. With it comes ModelSim ME Pro 2019.2.
    But I cannot run overnight simulations with this ModelSim ver as it loses memory @0.1MB/sec. It is the 32bit version and after >4GB utilization, ModelSim crashes.
    Problem has been reported to Microsemi.

    Now I also have a ModelSim DE-64 10.5 license and my intention is to use this instead of the shipped ModelSim version.
    I have read the Microsemi docu modelsim_se_pe_libero_soc_ug.pdf but it speaks only about using ModelSim SE/PE or QuestaSim. I am not sure if I can use the ModelSim-DE version seamlessly.

    Nevertheless I have been successful to launch the ModelSim DE version from Libero.

    I have used the tool generated run.do file and have manually run the vlib, vmap and vlog/vcom commands inside the required directory (after deleting the previously generated ones). But I get errors during the DO file compilation. Some block designs and FIFOs throws errors. I never had these errors when the default ver of ModelSim was run using the same DO file.

    So the question is, do I need to compile some other libraries?
    Am I missing something?
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    Re: Changing the ModelSim version that comes with Libero SoC v12.3

    when it it losing so much ram? are you sure youi dont have a memory leak in the testbench/sim or some other things happening?



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    Re: Changing the ModelSim version that comes with Libero SoC v12.3

    It is leaking with my testbench. First I thought there might be a problem with mine.
    Then I downloaded a Microsemi Demo Project (PCIe with DMA) from their website and there also I could see the memory leak.

    when it it losing so much ram?
    By just keeping the simulation running.

    I did look at this old post, your replies...
    https://www.edaboard.com/showthread....cation-failure
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    Re: Changing the ModelSim version that comes with Libero SoC v12.3

    Can you post any of the code?



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    Re: Changing the ModelSim version that comes with Libero SoC v12.3

    Quote Originally Posted by dpaul View Post
    I am using Microsemi Libero SoC 12.3 tool suite. With it comes ModelSim ME Pro 2019.2.
    But I cannot run overnight simulations with this ModelSim ver as it loses memory @0.1MB/sec. It is the 32bit version and after >4GB utilization, ModelSim crashes.
    Problem has been reported to Microsemi.

    Now I also have a ModelSim DE-64 10.5 license and my intention is to use this instead of the shipped ModelSim version.
    I have read the Microsemi docu modelsim_se_pe_libero_soc_ug.pdf but it speaks only about using ModelSim SE/PE or QuestaSim. I am not sure if I can use the ModelSim-DE version seamlessly.

    Nevertheless I have been successful to launch the ModelSim DE version from Libero.

    I have used the tool generated run.do file and have manually run the vlib, vmap and vlog/vcom commands inside the required directory (after deleting the previously generated ones). But I get errors during the DO file compilation. Some block designs and FIFOs throws errors. I never had these errors when the default ver of ModelSim was run using the same DO file.

    So the question is, do I need to compile some other libraries?
    Am I missing something?
    You have to compile all the stuff under ./project_folder/component. The Actel and work directories have all the IP HDL that you generate in the Libero tools. You also have to make sure you compile the appropriate device library as you can't use the pre-compiled ones.

    - - - Updated - - -

    -- added --

    If you have access to DE you should use it instead of the ME. From my profiling of the two versions on various long simulation runs DE typically runs close to 2x ME. Though that metric is for ME 10.x v.s. DE 10.x and not ME 12.x v.s. DE 10.x, so YMMV.



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    Re: Changing the ModelSim version that comes with Libero SoC v12.3

    Today Microsemi has acknowledged that Modelsim ME 2019.2 that comes with Libero SoC 12.3 has memory leak problems. It will be fixed in the next version of Libero. So I will wait for this for over-night simulation runs, I can live with that till then.

    If you have access to DE you should use it instead of the ME.
    I agree.
    I tried a lot yesterday and in my logical sense have re-compiled all the libraries necessary for my project. But still some FPGA primitives such as IOD (input output delay block) are not found by ModelSim during compilation. I did compile the polarfire.v with my ModelSim that comes with the Libero (and this .v does contain the definition of the IOD and other primitives).
    I have asked the support team to send me pre-compiled ModelSim DE 64 libraries to be used with Libero 12.3 for PolarFire.
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    Re: Changing the ModelSim version that comes with Libero SoC v12.3

    Did you use -L on the vsim command line and specify that the polarfile library?

    I never run with the gui launched tools, I write all Modelsim files for running a simulation and have never had an issue with missing Microsemi primitives, unless I forgot either to compile the library, named the library incorrectly, or forgot to add the -L to vsim.



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    Re: Changing the ModelSim version that comes with Libero SoC v12.3

    Yes, I did use the -L with the libraries.
    Following are the last lines from my DO file.

    Code:
    vsim -L PolarFire -L presynth -L COREAXI4DMACONTROLLER_LIB -L COREAHBLITE_LIB -L COREAHBTOAPB3_LIB -L COREAXITOAHBL_LIB -L COREAPB3_LIB -L CORESYSSERVICES_PF_LIB -L COREGPIO_LIB -L COREJTAGDEBUG_LIB -L CORERISCV_AXI4_LIB -L COREUARTAPB_LIB -L CORERESET_PF_LIB -L COREAHBLTOAXI_LIB -L COREFIFO_LIB  -t 1ps presynth.gl6_pf_tb
    do "wave.do"
    run 1000ms
    In the attached pdf doc, please go through Chapter1 if you have time. I have highlighted lines in there, the steps required to run a non-bundled ModelSim version.
    From what I have understood, the commands below can be saved as a script and run from any ModelSim prompt and that will generated the basic libraries.

    Code:
    #In the Transcript window at the ModelSim or QuestaSim command prompt, change to the
    #Microsemi folder (needs to be created)
    
    #vlib - Create the folders to store the compiled libraries
    
    #vmap - Map the simulation library location to the simulation library name
    
    #vlog/vcom - Compile the simulation libraries from the Verilog/VHDL sources
    
    mkdir Microsemi
    
    cd Microsemi
    
    vlib polarfire
    vlib smartfusion2
    
    vmap smartfusion2 C:/modelsim_dlx64_10.5/Microsemi/smartfusion2
    vmap polarfire C:/modelsim_dlx64_10.5/Microsemi/polarfire
    
    vlog -work smartfusion2 "C:/Microsemi/Libero_SoC_v12.2/Designer/lib/vlog/smartfusion2.v"
    vlog -work polarfire "C:/Microsemi/Libero_SoC_v12.2/Designer/lib/vlog/polarfire.v"
    Please tell me what else I need to do. Because I have run all of them still cannot make ModelSim DE function with Libero SoC 12.3.

    The screenshot shows that I have created the necessary libraries using ModelSim DE and those folders are not empty.

    Click image for larger version. 

Name:	libs.jpg 
Views:	0 
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ID:	157546
    All these were repeated for the other libraries required by the project. I can't find out what I missed or did wrong.
    Hence have requested Microsemi for precompiled ModelSim DE libs for PolarFire.
    Last edited by dpaul; 30th January 2020 at 10:34.
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    Re: Changing the ModelSim version that comes with Libero SoC v12.3

    Update...
    the steps required to run a non-bundled ModelSim version.
    Should be "the steps required to compile the libraries in order to run a non-bundled ModelSim version."
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    Re: Changing the ModelSim version that comes with Libero SoC v12.3

    Quote Originally Posted by dpaul View Post
    Some block designs and FIFOs throws errors. I never had these errors when the default ver of ModelSim was run using the same DO file.

    So the question is, do I need to compile some other libraries?
    Am I missing something?
    Given you seem to have all the appropriate libraries compiled, what exactly are the errors you get on those block designs and FIFOs? Can you post the errors.

    You never mentioned if you compiled all the files in the <libero_project>/components directories. That is where it stores all the FIFO and other IP generated by Libero.

    Also is this a design being ported to Polarfire from another device family? If so you must regenerate new cores in the Polarfile project, I have had no success migrating a IP core from one device family to another. For one thing most of the families primitives are all named differently from each other and the ones that do have the same name may not behave identically.

    According to the PolarFire MLG that primitive IOD doesn't exist, which makes me think you either have IP ported from another family or you have a custom IOD module that hasn't been compiled into the design. Maybe you could try using a file search and look for "IOD" and see if there are any files with that as a module/entity name.

    I think I will stop here, I'm just making a lot of guesses as I have none of the errors or transcript information from modelsim or any other information on your project. At minimum having the Libero project file to see where all the files in the project are located and expanding the hierarchy view would allow you to see if any files are missing.



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    Re: Changing the ModelSim version that comes with Libero SoC v12.3

    You never mentioned if you compiled all the files in the <libero_project>/components directories. That is where it stores all the FIFO and other IP generated by Libero.
    I am sure the tool generated DO file is taking care about them. It is attached.
    If you look at line num 12, it indicates the mapped polarfire library path, which I have created and compiled for using ModelSim DE-64.
    Everything else are design specific libraries compiled into <libero_project>/simulation/ from their source <libero_project>/component/work/

    Also is this a design being ported to Polarfire from another device family?
    No it has been generated from scratch. Some Microsemi IP cores have been used and the others are custom VHDL modules.

    I think I will stop here, I'm just making a lot of guesses as I have none of the errors or transcript information from modelsim or any other information on your project. At minimum having the Libero project file to see where all the files in the project are located and expanding the hierarchy view would allow you to see if any files are missing.
    Thanks for the suggestions till now. I didn't provide the sim logs or DO file in order to keep it less complicated while I wanted to convey the problem as clearly as possible.
    According to the PolarFire MLG that primitive IOD doesn't exist, which makes me think you either have IP ported from another family or you have a custom IOD module that hasn't been compiled into the design. Maybe you could try using a file search and look for "IOD" and see if there are any files with that as a module/entity name.
    This is a good pointer. I will now explain what exactly fails.

    Attached is the simulation log file.
    As an example to illustrate the problem, take a llok in to line num 5674.

    Code:
    # ** Error: (vsim-3033) C:/Microsemi/Libero_SoC_v12.3/Designer/lib/vlog/polarfire.v(36064): Instantiation of 'iog_dlycntl' failed. The design unit was not found.
    #    Time: 0 ps  Iteration: 0  Instance: /gl6_pf_tb/gl6_pf_0/amba_sys/CCC_0/PF_CCC_C0_0/pll_inst_0/u_delay/u_delay File: C:/Microsemi/Libero_SoC_v12.3/Designer/lib/vlog/polarfire.v
    #         Searched libraries:
    #             C:/modelsim_dlx64_10.5/Microsemi/polarfire
    #             D:/work/fpga_gl6/gl6_pf_12_2/simulation/presynth
    #             D:/work/fpga_gl6/gl6_pf_12_2/simulation/COREAXI4DMACONTROLLER_LIB
    #             D:/work/fpga_gl6/gl6_pf_12_2/component/Actel/DirectCore/CoreAHBLite/5.4.102/mti/user_vhdl/COREAHBLITE_LIB
    #             D:/work/fpga_gl6/gl6_pf_12_2/simulation/COREAHBTOAPB3_LIB
    #             D:/work/fpga_gl6/gl6_pf_12_2/simulation/COREAXITOAHBL_LIB
    #             D:/work/fpga_gl6/gl6_pf_12_2/simulation/COREAPB3_LIB
    #             D:/work/fpga_gl6/gl6_pf_12_2/simulation/CORESYSSERVICES_PF_LIB
    #             D:/work/fpga_gl6/gl6_pf_12_2/simulation/COREGPIO_LIB
    #             D:/work/fpga_gl6/gl6_pf_12_2/simulation/COREJTAGDEBUG_LIB
    #             D:/work/fpga_gl6/gl6_pf_12_2/simulation/CORERISCV_AXI4_LIB
    #             D:/work/fpga_gl6/gl6_pf_12_2/simulation/COREUARTAPB_LIB
    #             D:/work/fpga_gl6/gl6_pf_12_2/simulation/CORERESET_PF_LIB
    #             D:/work/fpga_gl6/gl6_pf_12_2/simulation/COREAHBLTOAXI_LIB
    #             D:/work/fpga_gl6/gl6_pf_12_2/simulation/COREFIFO_LIB
    It says that "Instantiation of 'iog_dlycntl' failed". Now take a look at polarfire.v file (supplied as by Microsemi which needs to be compiled).
    There in at line num 36064 I see that it is instantiated. Now where am I supposed to find iog_dlycntl and compile it for ModelSim DE-64?

    That is why I think pre-compiled libraries for ModelSim DE-64 needs to be provided.

    Else if you say that C:/Microsemi/Libero_SoC_v12.3/Designer/lib/vlog/polarfire.v is not the correct file to be compiled, then which one should I compile (among the ones that come with Libero SoC v12.3)?

    Note: When the block design was created using the IPs, the simulator was set to the default ModelSim that comes bundled (should it be an issue?).
    Last edited by dpaul; 31st January 2020 at 16:14.
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  12. #12
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    Re: Changing the ModelSim version that comes with Libero SoC v12.3

    Did a search of the entire Microsemi directory for 12.3 and that module doesn't exist (nor does it exist in an earlier version). I suspect the file that has that module (it's not a primitive) is on the computer of the person who generates the precompiled libraries in some directory that was not included as part of their source control for the Libero tools version release. They probably (obviously) don't pull their released tools onto a pristine computer to verify that the release is complete.

    You will have to bring this up with Microsemi as the file that includes that module should have been included in the package.

    ARAIK Microsemi has never provided a precompiled library for the full version of Modelsim.

    One workaround would be to temporarily comment out the PLL module and submodules in the library. This will only work if you aren't using the PLL in your design.


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    Re: Changing the ModelSim version that comes with Libero SoC v12.3

    Two tickets have been logged at Microsemi last week:
    1. Provide pre-compiled libraries for DE-64 ver.
    2. They have also acknowledged the ModelSim ME 2019.2 memory leak issue.
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    Re: Changing the ModelSim version that comes with Libero SoC v12.3

    Quote Originally Posted by dpaul View Post
    Two tickets have been logged at Microsemi last week:
    1. Provide pre-compiled libraries for DE-64 ver.
    2. They have also acknowledged the ModelSim ME 2019.2 memory leak issue.
    You shouldn't be asking for a pre-compiled library you should be requesting the source file that contains the missing module. For modelsim the library database is tied to the version.



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    Re: Changing the ModelSim version that comes with Libero SoC v12.3

    You shouldn't be asking for a pre-compiled library you should be requesting the source file that contains the missing module. For modelsim the library database is tied to the version.
    Well I did ask for that and the local FAE told me that it won't be provided.
    They will provide the compiled libraries for the 64bit DE version.

    with this info I think it is appropriate to close this thread.
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