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Circuitry to make Paralleled Buck converters share current.

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treez

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Hi
The attached (LTspice sim and pdf schem) is two paralleled Buck converters.
Please assist us in making out the circuitry required to make these Bucks share current equally between them.

The circuitry shown inside dotted lines is what we have so far. However, we need the sharing to be done over the entire load range of zero to 8A.

Clearly what we have here will not do the job over the load range. So we need circuitry to indicate the difference between the load currents, and then accordingly adjust the individual reference voltages into the error amplifiers of each Buck…to make them share current. As you know, the circuitry should reduce the reference voltage of the highest current Buck, so as to make it peg back its current and Vice Versa for the other Buck….to make them share equally.
 

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  • Paralleled sharing Bucks.txt
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Hi,

One idea is to use one master and all others as slave.
The master does the voltage regulation (loop) ....and measure it's own current.
It passes the "current information" to the slaves ..
And each slave does the current regulation loop.

This way you are sure that all devices deliver the same current.

One need to take care about overall stability.

Klaus
 
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One idea is to use one master and all others as slave.
The master does the voltage regulation (loop) ....and measure it's own current.
It passes the "current information" to the slaves ..
And each slave does the current regulation loop.

This way you are sure that all devices deliver the same current.

One need to take care about overall stability.

Thanks Klaus,
Yes the “master-slave” method, with master regulating voltage , and slaves regulating to the master’s current , is like in the attached….unfortunately this method can mean noise getting into the current demand signal from the master …specially since the paralleled power supplies will actually end up being totally separate units.
Also, as you tend to imply if i may say, the voltage feedback loop of the master has to be some 3 x slower than the current feedback loop of the slaves…and this means the overall voltage feedback loop being relatively sluggish.
 

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  • LT3791fb_Parallel buckboost.pdf
    1.1 MB · Views: 101

If you share a single gate drive signal and carefully match the layout it should share ok (Easy Peasy and I agreed on this in your last thread). All the tempco's are in your favor (copper and fets). I have a board out for fab relying on exactly this (no results yet).


But for this application first I'd look for a dedicated 'interleaved' controller meant for multiple phases. The ideal controller will have multiple current mode controllers built in and will interleave phases 180 degrees apart with huge benefits in terms of output filtering requirements (ripple cancellation and 2x the effective switching frequency at the output filter).

If that fails I'd look for current mode controllers that explicitly support paralleling or any current mode controller that exposes the current control input. Then you can do as Klaus says and send a single voltage error amplifier output to both current control inputs.

Interleaved controller showing their sharing scheme (but doesn't go to 8V out)
https://www.onsemi.com/pub/Collateral/NCP5222-D.PDF


As for control...Treez every current mode buck converter (billions) has an outer voltage loop with less bandwidth than the inner CMC loop and it works great because the inner CMC loop can be very fast. There is no difference here, you just need to have decent layout routing the control signal to 2 controllers (put them near each other).
 

As for control...Treez every current mode buck converter (billions) has an outer voltage loop with less bandwidth than the inner CMC loop and it works great because the inner CMC loop can be very fast. There is no difference here, you just need to have decent layout routing the control signal to 2 controllers (put them near each other).
Thanks, yes I agree with you in the specific example which you give here..ie the “inner current loop of a current mode controller”…..but isn’t the situation of the master-slave approach detailed by Klaus above slightly different?......i mean, both the current regulating slaves, and the voltage regulating master , will both be “current mode controlled”……. And it’s the outer feedback loop of both of these which we are considering…..neither will be as fast as the ” inner current loop of a current mode controller”…..and as discussed, these "slave" outer current loops can’t run at the same bandwidth as the "master" outer voltage loop else they will “fight” each other……….so the outer voltage loop of the master will have to be made slower than the outer current control loop of the slaves….and the end result of this…..is that you have an overall sluggish voltage control loop....but i do see what you mean by your example, just that i dont see how either our master or slave outer feedback loops can be made as fast as the ” inner current loop of a current mode controller”...apologies if thats not what you meant anyway.

I might be wanting my cake and eating it however, because I suspect that all groups of power supplies subjected to current sharing regimes end up with an overall sluggish feedback loop….even the ones kindly suggested by WWFeldman above (ie using UC3907)

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Also thanks for your details of the interleaving controller……..i appreciate your help here.
The thing is, we are considering a way of making totally separate power supplies to share with each other, into a single voltage regulated output….and really, those interleaving controllers need to go on the same PCB, and are, effectively, just one overall "dual power supply"….

I apologise because the reason we are looking into this isn’t specifically because of the Buck example that I gave here in the top post…its because we wish to do a 12.5Kw, 800V power supply, from a 400V PFC’d output. (input is mains 240vac)

...The best way we can think of is to have four sets of 3.15kW converters each comprising an interleaved 3.15Kw Boost PFC, feeding a 3.15kw Dual LLC converter with isolated stacked outputs (2*400v for 800v)……..then we will make the four 3.15kw, 800v outputs go into one 800v output…by use of a sharing technique between the four of them...this is why we are interested in "sharing" techniques.

(Basically, we need a 800V, 12.5Kw power supply from a 240vac mains input.)
 
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You're overthinking it.

Whether you have one or more inner current controllers makes no difference to the outer voltage loop. The voltage loop has some output voltage range (maybe 0-4V). Maybe that range makes 0-4A from one current controller. Or maybe it makes 0-1A each for 4 parallel current controllers. The voltage loop doesn't know the difference. Same bandwidth considerations for either design (there is no 'outer current loop').

I would not be terribly worried about routing a, say, 10khz bandwidth voltage loop output to multiple boards.

EDIT: Nevermind.


If you're doing LLC's which are a voltage output topology you probably want to stack them all in series rather than try to parallel any of them (4x200V using 650V secondary rectifiers in a center tapped secondary rectifier topology). Or find a suitable current controlled isolated topology that's easy to parallel (phase shifted full bridge is one option).

Possibly research 'current fed' options where your primary (boost here) is current controlled and drives current through the LLC to the output (the boost has no voltage loop of it's own, voltage is taken from the LLC output and fed back to the boost current loop input).


For general sharing look at examples of modules which have a current share port. I understand it works something like this: Each module has a current output pin representing a scaled down value of its actual output current and drives that current onto a resistor. Short these pins of all the modules together and you have a voltage that represents the average current of each module. Now each module runs a slow feedback loop to make its output current equal to the average.


Here is a paper on a current fed topology from magna power (they make nice lab supplies BTW):
https://magna-power.com/learn/white-paper/current-fed-power-processing
 
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Thanks, so you are saying that the feedback loop bandwith of the "master" and the "slaves" of the attached could all actually be the same, and this wouldnt give problems?
 

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  • LT3791fb_Parallel buckboost.pdf
    1.1 MB · Views: 100

On a quick look I had a hard time following that one. It may be a follower scheme (where the slaves are set to follow the

This one (though also over complicated) more clearly shows the output of the voltage error amplifier feeding the CEA input of multiple phases:
https://datasheets.maximintegrated.com/en/ds/MAX5038-MAX5041.pdf

In this case there should be no bandwidth limitations related to adding multiple phases. The current loops have no master/slave relationship - just multiple equal current loops in parallel.
 

If you're doing LLC's which are a voltage output topology you probably want to stack them all in series rather than try to parallel any of them (4x200V using 650V secondary rectifiers in a center tapped secondary rectifier topology).
Thanks, this sounds excellent....i like LLC for high voltage outputs like 150V+...because the LLC suffers no overvoltage ringing to its secondary rectifiers...unlike PSFB or FB.

So anyway, this would mean four separate 3.15kw converters each with a 200V output from an LLC...and all these four modules being stacked on top of each other, to give 800V, 12.5kW.
To make it even easier, we could even do eight 100V, 1.56kw converters..anmd stack them.
Many low power smps's tends to mean easier to source components...despite it meaning more components......plus we dont like heavy transformers on PCBs...makes them bend and break any SMD ceramic caps etc.

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Also, multiple , same smps's means excellent thermal spreading.

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We may even consider sixteen 50V , 780W output converters all stacked for the 800V, 12.5kW....Eg, Sixteen two transistor forwards each with sync rectifiers....Big heatsinks, since this 800V power supply will be on the ground and weight isnt so important.

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On a quick look I had a hard time following that one. It may be a follower scheme (where the slaves are set to follow the
...yes thats it...the slaves just copy the masters current...the master sets the vout......the slaves being of the same feedback loop bandwidth as the master may cause issues.

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I must admit, stacking SMPS's to get high voltage high power outputs seems an easy way...and makes us wonder on the downsides of this....i appreciate we must add a diode across the output of each power module, to avert potential disasters....stacking seems just too good to be true....but even i have done it before with power modules for test jigs when i needed a quick 96V 1A say (2 x 48V isoalted power supplies)
 

Depending on the PWM controller you may find it easy
to gang parallel converters with decent load sharing.
Or not.

If the error amp feeds the current compare in a
current mode control PWM then you have a good
resource. In my POL DC-DC chip designs we brought
the EA output off chip (COMP node, to hang a shunt
C compensation cap externally). In fact we brought
out all 3 EA signal pins. This enabled us to make an
easy parallel scheme.

You use one PWM / POL as a master in the normal
configuration. The rest, you rig the EA as a simple
A=1 follower. This repeats the control voltage to
the current compare, nicely buffered. You can do
this for a lot of converters if you like. I only ever
characterized matching for a pair, master/slave,
run antiphase (we also put a SYNCb output for this,
inverted SYNC (if active) or the master's internal
oscillator if left to free-run. So a 2-phase, 2X current
buck for nothing but wire. If the voltage to current
transfer function is consistent part-part, lot-lot then
you can get very good sharing (I saw sub-% at the big
end, but this was all a single lot's worth of material).

Not all CMC PWMs will offer you such access, but it
might be worth looking for.
 

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many years ago, i worked for a company that built a 50 kV, 100 kW power converter
we made it by connecting about 12(?) converters in series

the competition built built the same specs into a bunch of parallel converters.

we all started at the same time, and we shipped production units before the
competition got their form fit and function prototype working.

you might want to consider building your device with series connected
converters instead of parallel connected converters.
 
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