Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

ZYNQ 7Z030 LVDS IO - 910 Mbps and Ethernet

Status
Not open for further replies.

engr_joni_ee

Advanced Member level 3
Joined
Nov 3, 2018
Messages
726
Helped
2
Reputation
4
Reaction score
4
Trophy points
18
Activity points
6,042
Hi,

I am working with a project having around 70 DDR LVDS 910 Mbps connections to FPGA. I am wondering if ZYNQ 7Z030 have enough LVDS IOs with at least 910 Mbps ?

Another question, as there are two Ethernet Controllers in ZYNQ 7Z030, does this means that no Ethernet controller chip is required on the PCB and only Ethernet PHY port is needed which has to be directly connected to ZYNQ 7Z030 ?
 

You want to read ds191-XC7Z030-XC7Z045-data-sheet and ug865-Zynq-7000-Pkg-Pinout to answer the question. The larger (676 pin) package has sufficient differential pin pairs, smaller (484 pins) only scarcely.

Yes, only external PHY needed, special ethernet standards might work without PHY.
 

Hi,

Yes ZYNQ-7Z030 FFG676 package has the followings.

HR I/O - 100
HP I/O - 150
PS I/O(2) - 128
GTX Transceivers - 4

What is the difference between high resolution and high performance IOs ? Which of them support LVDS signalling ?
 

The package pinout has an explicit spec of available differential pairs.

Difference between HP and HR is explained in datasheet, both support LVDS at 910 MBPS with respective chip speed grade.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top