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  1. #1
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    P1500 Wrapper implementation

    Hi,
    I am new in this field. I have rtl code of an IP. Now I want to implement wrappers around the i/o ports. Can you please suggest me how to do that? Do i need to write rtl code for the wrappers as well or any other means are available?

    Thanks in advance.

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  2. #2
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    Re: P1500 Wrapper implementation

    Do you mean hdl rather than rtl? The usual answer is yes. Maybe you could use a graphical tool. Please give more details and ask a more specific question for a better answer



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  3. #3
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    Re: P1500 Wrapper implementation

    I want to implement the wrapper using p1500 standard and implement WIR, WBY, WBR registers. So my question is there any software like synopsis, vivado, cadence etc available which can create the wrappers or have options to modify any generated wrappers or do i need to write verilog for each register and boundary cells?

    Thanks.



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  4. #4
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    Re: P1500 Wrapper implementation

    I can speak about the FPGA tools, specifically Vivado. They don't have capabilities of an automatic wrapper creation. You must write the RTL for it.
    FPGA enthusiast!



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