Hawaslsh
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Hello all,
I am having a problem I can't seem to diagnose: I have a PLL centered around a ~24 GHz VCO. The block diagram is shown above, defiantly not the best design, open to criticism. The VCO provides a N/16 output which is mixed with a 1.5 GHz reference provided by a HP frequency synthesizer. A highish speed amp, ad817, used to amplify and level shift the signal to 0-5V. The second phase comparitor output from a CD4046 is used on conjunction with another known 1 MHz source.
I am having a problem at the LPF stage. The initial design (circuit on the right above) worked as expected. Given a decent DC starting point (~200 KHz from Fc) it locked fairly consistently. However, I wanted to see if other LPF designs could help improve my phase noise and side band generation. I tried the filter design on the left and as soon as I made the connection from the LPF to the VCO, I hit the current limit on the DC supply (~100mA I dont want to push it). When the DC supply is removed from the equation, the VCO output acts as if zero voltage is applied to Vcontrol. I feel silly posting this, since more likely than not its simply just a short, but i scoured the darn thing over and over with a multi-meter. Despite that feeling, i felt completed to reach out and ask if there might be any other reason why the second filter design (with a much high cut off) might be causing this behavior other than a real short circuit. Maybe something to do with the 4046's charge pump?
Thanks for any help, this one currently has me stumped :bang:
Sami
I am having a problem I can't seem to diagnose: I have a PLL centered around a ~24 GHz VCO. The block diagram is shown above, defiantly not the best design, open to criticism. The VCO provides a N/16 output which is mixed with a 1.5 GHz reference provided by a HP frequency synthesizer. A highish speed amp, ad817, used to amplify and level shift the signal to 0-5V. The second phase comparitor output from a CD4046 is used on conjunction with another known 1 MHz source.
I am having a problem at the LPF stage. The initial design (circuit on the right above) worked as expected. Given a decent DC starting point (~200 KHz from Fc) it locked fairly consistently. However, I wanted to see if other LPF designs could help improve my phase noise and side band generation. I tried the filter design on the left and as soon as I made the connection from the LPF to the VCO, I hit the current limit on the DC supply (~100mA I dont want to push it). When the DC supply is removed from the equation, the VCO output acts as if zero voltage is applied to Vcontrol. I feel silly posting this, since more likely than not its simply just a short, but i scoured the darn thing over and over with a multi-meter. Despite that feeling, i felt completed to reach out and ask if there might be any other reason why the second filter design (with a much high cut off) might be causing this behavior other than a real short circuit. Maybe something to do with the 4046's charge pump?
Thanks for any help, this one currently has me stumped :bang:
Sami