What is the drawback of operating in subthreshold

Specifically, I'm building a constant-gm bias circuit (ie. delta-Vgs) with relatively low current consumption. What are the drawbacks of operating in subthreshold vs saturation?

I know it will cost me more area to bring the operation to subthreshold (i.e. high W/L) but how about performance drawbacks, are there any?
Mismatch effect is greater in subthreshold?

Thanks in advance for your replies.

Somewhere down the subthreshold slope, you bump into the
leakage floor. If you're close to the "knee" (or maybe it's the
elbow) you can expect worsening match, loss of current
mirror fidelity (esp if any DIBL behavior), or loss of control
(try to throttle below leakage floor, no bueno). I'd say you
want to stay a decade above the highest observed leakage
floor of a large sample size, multiple lots spaced over months
/ years, max junction temp plus margin. If you don't know
these realities then you're on some sort of adventure, to
be discovered later. Models tend to be poor at predicting DC
leakage and its variation.

A device operated subthreshold will have inferior Id/Cdg
which is a proxy for bandwidth. Subthreshold is usually for
low power concerns. You do gain a wider saturated region
of operation and better Rout. Whether that compensates
for lesser gm, you'd have to play around and see.

If it were my circuit I'd start with ideal biasing of the signal
chain and then worry about making it an on chip reference.
There's no reason to push for subthreshold in the reference
if the signal chain is going to operate at higher current
densities. Or conversely. You also may, or may not, actually
want constant-gm biasing. There may be other trends in
the circuit that want rising gm w/ temp (for example junction
capacitances go up, Rout goes down, constant bandwidth or
constant gain would want gm made to compensate).

Thank you for the explanation!
I don't actually intentionally go to subthreshold but the current requirement kinda force me into this region.
For a standard supply voltage variation (+/- 10%) and temperature variation (-40 to 125degC), what kind of spread on the current would you say you would expect on a constant-gm bias circuit? I think I'm getting higher than normal spread for some reason, and this is without mismatch (no Monte Carlo), just normal PVT spread.