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Offline isolated Two transsitor forward with synchronoys rectifier control circuit

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treez

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Offline isolated Two transistor forward with synchronous rectifier control circuit

Hi,
There are virtually no IC’s on the market that manage synchronous rectifier drive for isolated offline Two Transistor Forward Converters, or even for any other type of offline isolated converter. (eg Flyback, LLC, Full Bridge).
This is a very bad state of affairs. As such, we have designed our own discrete synchronous rectifier drive circuitry. This is as attached in the LTspice simulation and schematic.
All that’s basically needed is to invert and delay and trim the waveforms sufficiently to achieve the correct dead times between the respective gate drives, and of course, reverse overcurrent protection.
However , a microcontroller is needed, one on the primary and one on the secondary. The secondary one simply manages the reverse overcurrent latch.
The primary side microcontroller provides the 280ns signal delay that’s needed for the main gate drive signal from the PWM controller. This delay is essential and is part of getting the dead time for the synchronous rectifier gate drives.
I actually believe that a third small micro would be adviseable, on the secondary side, to replace the shown digital logic gates. Also, the 50ns delay block could in reality, only be done with a microcontroller.

There are a number of offtheshelf synchronous rectifier controllers available which have no connection to the primary side PWM controller…eg UCC24630…these are not useful, as they rely on detection of noisy switching nodes which may mean noise tripping and malfunction….after all, switching a synchronous rectifier on at the wrong time can be pretty catastrophic.
UCC24630
https://www.ti.com/lit/ds/symlink/ucc24630.pdf

So would you agree that these kind of “Home-brew” synchronous rectifier controllers are the way forward?

Amongst other things, they use microcontrollers as “delay buffers”.
Attached is the LTspcie sim and schem of a Two transistor forward with sync rects, and our home-brew sync rect driver circuitry.
 

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If you are going to use a microcontroller there is no reason to use more than one. Any MCU running at a reasonable clock speed can produce all the switching signals and handle the regulation as well. Where they fall short is having the current drive capability and level shifting needed to drive the primary circuit.

You can optically couple the rectifier switching signals and the feedback signals. Yes, there are delays in response and edge timing which you have to cater for in external drive circuits but all of these are fixed and easily compensated in software. Work out a timing diagram of all the signals and look for the minimum overlap or gap between them and from there you can find the maximum allowable switching time between port control signals and hence MCU speed.

Brian.
 
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Thanks, i assume a micro running on a 32MHz clock would be able to delay a square wave by 125ns?
Thats a bit longer than we would like, but not too bad.
A 64MHz micro would be able to delay it by 62.5ns?
But i am just trying to find out how easy it is to set up a micro running at 64MHz?

I am just wondering if getting the delays might be easier with digital buffers in series (as many as needed for the particular delay)
 

64MHz is no problem. Don't think of it as needing 'VHF' circuit design because externally most use a slower and cheaper XTAL oscillator and an internal PLL frequency multiplier. For example 16MHz crystal times 4 = 64MHZ.

If you are prepared to sacrifice ONE cycle delay, you don't have to produce signals 'live', you can produce them with slower delays by switching on the next (or any subsequent) cycle instead. I think if I were designing I would try for 'live' control though, just to keep the program simple.

Brian.

[edit] why use digital buffers in series when you can achieve the same with an RC circuit?
 
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I agree that for very short delays you can utilize the propagation delay of logic gates but the issue of exact thresholds and the time it takes to pass them would apply anyway, regardless of whether it was an RC delay or the rise/fall of a digital signal. RC created delays might need 'squaring up' if the signal was going back into the digital domain but as an alternative to many chained gates it is more economical and just as precise.

Brian.
 
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Thanks Betwixt, in fact yes, its better to use RCs as you say....i did this and it actually allows the pulse to be trimmed in time as well as delayed...so i reduced the overall circuitry...

The attached schematic ,(and LTspice simulation) would you agree, is the de facto way to drive synchronous FETs for a Full Bridge, Two Transistor forward, or Flyback. Its shown here for a Two transistor forward, but its easy to see how this transfers to Flybacks, Full and Half Bridges too.
The cost is very low, simply using a few MC74VHC1G126 logic buffer ICs, and some RC delays, and a digital isolator IC.
MC74VHC1G126 logic buffer datasheet
https://www.onsemi.com/pub/Collateral/MC74VHC1G126-D.PDF
I was thinking I may need Schmitt Trigger buffers, but the above ones have the same effect as Schmitt outputs anyway, would you agree?

All the offTheShelf solutions for this (driving synchronous rectifiers) , involve ICs that are ridiculously expensive. Eg, look at the LT1681/LTC1698 combo, for driving Two transistor forwards with synchronous rectifiers…they are $6 each !!!

Why are people not using this technique?
All it involves is delaying the drive output of a PWM controller…..then also inverting the output of the controller…..then delaying the inverted output a bit less, and trimming it in time so it fits between the PWM output pulses, giving the required dead time.

So simple & cheap and yet nobody doing this? Why?

(obviously reverse overcurrent limiting needs adding…but add a comparator and sense resistor or CST, and Bob’s your uncle!)

Would you agree, from the datasheet, that the output impedance of the MC74VHC1G126 is 7V/0.025A = 280R?
 

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  • Sync Rect logic _2TFC.jpg
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The only practical difference between a normal and Schmitt logic input is the hysteresis between high and low levels. In a situation where the signal swing will always pass the logic threshold you can use either type equally well.

I would guess the reason why nobody follows this topology is simply that the advantages of synchronous rectification are small for the extra cost it introduces. It makes a difference when products are mass marketed and almost everybody accepts the losses in conventional rectifier circuits. Fast diodes are much cheaper than power MOSFETs and driver circuits. Only specialized equipment needs the extra electrical efficiency and in those circumstances the money to pay for it is usually there.

I still think it should be possible to utilize a fast MCU to do most of this, including the primary drive adjustments based on secondary side monitoring. I haven't tried it and do not have the facilities to prototype such a design but intuitively it seems quite feasible. The limitation would probably be ADC speed when reading output voltage or current but most MCUs can read accurately at KHz rate these days.

How did you know I had an uncle Bob? :-D
(Actually, I'm a bit long in the tooth to have any uncles left! - even my step daughter is 55 years old. I hope she's not reading this, she is a Forum member!)

Brian.
 

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