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    Including geometric variation of transistors using Montecarlo simulation in Cadence

    Hello friends,

    I read couple of papers in which the author performed a montecarlo based on geometric (dimention) variations. How can I define such setup ? is there any setting for that ?

    for further detail you can see the following papers

    https://ieeexplore.ieee.org/document...number=4349224

    https://link.springer.com/article/10...470-016-0874-2


    Also in the first paper the author run the Montecarlo in conjuction of corners (SS, FF...etc), why he should include these corners when it will aready covered by the montecarlo variation ?

    Thank you

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    Re: Including geometric variation of transistors using Montecarlo simulation in Cade

    Simply use mismatch parameters which include geometrical dependencies.

    See https://designers-guide.org/forum/Ya...num=1276330403
    Last edited by pancho_hideboo; 11th December 2019 at 10:57.


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    Re: Including geometric variation of transistors using Montecarlo simulation in Cade

    Quote Originally Posted by Junus2012 View Post
    Also in the first paper the author run the Montecarlo in conjuction of corners (SS, FF...etc), why he should include these corners when it will aready covered by the montecarlo variation ?
    Do you have any model you can play with? The answer to this question becomes quite trivial when you see how foundries organize their models, corners, and process variation distinction (global and local)
    Really, I am not Sam.


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    Re: Including geometric variation of transistors using Montecarlo simulation in Cade

    Simply, read this friendly manual. In this case, your process documentation. For your process is nice and short document about Mismatch and how it is modeled as well.


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