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In snapback mechanism how voltage reduces when parasitic NPN is turned ON?

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MubarakKhan

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I'm reading the following paper about SNAPBACK

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In the case of positive ESD stress, the VGBNPN
is triggered when the voltage on the collector electrode reaches
the base–collector breakdown voltage. The resulting avalanche
current flowing through the internal base resistance then forward-biases the base-emitter junction and triggers the n-p-n
bipolar transistor on. Once the n-p-n turns on, the avalanche and
bipolar effects combine resulting in the decrease of collector
voltage down to the snapback holding voltage.

hear a decrease in voltage to snapback voltage means a quick drain of collecter voltage or something else.
 

... a decrease in voltage to snapback voltage means a quick drain of collecter voltage or something else.

Once the n-p-n turns on means it is conducting and so presents a low resistance to the ESD event. Such an ESD event owns a certain energy E = ∫V(t)*I(t)dt , which is dissipated in that n-p-n transistor. Its on-resistance defines the (initial max.) current I(t) through it, and via its resistance - on its part - defines the snapback voltage V(t). Both are time-dependent, same as the remaining ESD energy during its dissipation.
 

The voltage reducing, is an outcome of testing it with a
current source. If you tested with voltage you'd see
current "snap up" instead (and probably fry the sample
before compliance limit kicks in).

You're adding a (latching) shunt conductive path, so of
course voltage will drop.
 

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