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    [Cadence ADE XL] Optimize a Common Source Amplifier to 15dB gain via Corner Analysis

    Hi there I'm a student intern, very new to ADE XL, with basic knowledge of Analog IC in Common Source Amplifier Characteristics.
    I am seeking some help in some guide in using the Corner Analysis / Optimization tools in ADE XL.

    Firstly, I need to optimize a Common Source Amplifier circuit as shown, with one single bias point, Vindc, maintain > gain of 15 dB @ saturation region [2]
    I'm allowed to manipulate the W/L / R_D / Vindc. While keeping the V_DD constant @ 1.2V.

    The circuit must work in -40, 27, 70 and 125'C at the corners 'tt', 'ss', 'ff', 'fnsp' and 'snfp'.

    The problem arise caused by my corner and temperature settings, the Vout vs Vin generated is offset, and I couldn't determine the best Vindc point.
    I've been struggling to manipulate to W/L and R_D / Vindc such that to minimumize this offset to all my circuit to provide a good consistent gain of > 15 dB ?

    I've been struggling for 4 days with this question given by my supervisor...

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  2. #2
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    Re: [Cadence ADE XL] Optimize a Common Source Amplifier to 15dB gain via Corner Analy

    You cannot find Optimum Vdc(in) in such a way..Here, you're changing Vdc(in) and obviously Vout is changing..
    Gain is another metric and specification.Look at Gain equation of this amplifier in a textbook then find another equation that relates this Gain to Vdc(in) then find optimum value ..
    But I'm not sure you know what the Gain is..


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    Re: [Cadence ADE XL] Optimize a Common Source Amplifier to 15dB gain via Corner Analy

    Quote Originally Posted by BigBoss View Post
    You cannot find Optimum Vdc(in) in such a way..Here, you're changing Vdc(in) and obviously Vout is changing..
    Gain is another metric and specification.Look at Gain equation of this amplifier in a textbook then find another equation that relates this Gain to Vdc(in) then find optimum value ..
    But I'm not sure you know what the Gain is..
    Well, the simplified form is just Av = - g_m * R_D ... ?
    I was recommended to read Design of Analog CMOS Integrated Circuits: Behzad Razavi... but I think my background is too weak to understand most of the concepts mentions.

    From what I realized from the Result Browser... The g_m is constantly changing as well with change in Vin.
    How possible a proper method in obtaining a predictable calculable results...?

    When the simulation will vary the values of g_m and 'betaeff' - u_n C_ox?

    Any assisted guidance on materials to read is appreciated.



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    Re: [Cadence ADE XL] Optimize a Common Source Amplifier to 15dB gain via Corner Analy

    If you need 15dB DC gain above circuit is pretty useless, only at the ouput transition you have gain (derivate of your curves), which is input gate threshold voltage dependent, thus corner dependent. You should use an OPAmp circuit rather, I suppose your supervisor won't be happy, but unfortunately I don't know better way.
    If you need 15dB AC gain use a bias circuit (a current source + diode connected MOS transistor enough) and decouple it from your amplifier's gate with a big inductor or resistor. To couple your AC input signal to the amplifier's gate use a simple capacitor series with your AC source. It should handle corner variation and with proper output Rd load resistor you can cover most of the corners with relatively constant gain.
    "Try SCE to AUX." /John Aaron/



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    Re: [Cadence ADE XL] Optimize a Common Source Amplifier to 15dB gain via Corner Analy

    Quote Originally Posted by frankrose View Post
    If you need 15dB DC gain above circuit is pretty useless, only at the ouput transition you have gain (derivate of your curves), which is input gate threshold voltage dependent, thus corner dependent. You should use an OPAmp circuit rather, I suppose your supervisor won't be happy, but unfortunately I don't know better way.

    If you need 15dB AC gain use a bias circuit (a current source + diode connected MOS transistor enough) and decouple it from your amplifier's gate with a big inductor or resistor. To couple your AC input signal to the amplifier's gate use a simple capacitor series with your AC source. It should handle corner variation and with proper output Rd load resistor you can cover most of the corners with relatively constant gain.

    Yes. I'm looking for 15dB AC Gain to allow AC Small Signal through. Hence I need to bias it at which Vindc should correspond to 0.5 VDD to allow maximum swing.
    Are you proposing that I replace my R_D Load Resistor with a diode connected load, which acts as a current source?

    https://i.stack.imgur.com/b6flD.png



    As I'm not able what you are implying here.

    Or are you proposing that I use two stages? A Common Source connected to a Source Follower?
    A Circuit Diagram would be helpful.



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    Re: [Cadence ADE XL] Optimize a Common Source Amplifier to 15dB gain via Corner Analy

    Just read thoroughly. frankrose is suggesting a separate bias circuit to generate a variable gate voltage for the amplifier transistor.



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    Re: [Cadence ADE XL] Optimize a Common Source Amplifier to 15dB gain via Corner Analy

    I recommended you the section a) of below picture. The bias circuit is M3(diode connected) + the current source, the DC coupling device is R, and the AC coupling device is C. You should replace (or not) diode connected M2 with a resistor.


    The section b) of the picture is an other type of biasing, it is called self-biasing, where the M1 (amplifier device) sets its own operating Vgs by negative feedback through R. It also can handle corner variations.
    "Try SCE to AUX." /John Aaron/



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    Re: [Cadence ADE XL] Optimize a Common Source Amplifier to 15dB gain via Corner Analy

    Quote Originally Posted by frankrose View Post
    I recommended you the section a) of below picture. The bias circuit is M3(diode connected) + the current source, the DC coupling device is R, and the AC coupling device is C. You should replace (or not) diode connected M2 with a resistor.


    The section b) of the picture is an other type of biasing, it is called self-biasing, where the M1 (amplifier device) sets its own operating Vgs by negative feedback through R. It also can handle corner variations.
    Thank you for your reply.
    I try to see how the device works before coming back for you later.
    how does one learn CMOS Transistor Level Circuits for its operations.
    It seems very difficult as my university didn't really expose much indepth towards the operating principle of such devices.



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    Re: [Cadence ADE XL] Optimize a Common Source Amplifier to 15dB gain via Corner Analy

    I just realized I can't edit post here.
    Supervisor asked me to 10dB AC gain instead.

    He claims it is possible. I just need to analyze all the possible combinations...
    Using this circuit. Got I feeling I might being trolled here...



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    Re: [Cadence ADE XL] Optimize a Common Source Amplifier to 15dB gain via Corner Analy

    after literally a week's of trial and error and playing around with 241 iterations.
    ... I reduced the 6kOhms to 1 kOhms it worked...
    I didn't played with W. It is scary to see my stuff fail and readjusting the bias points over and over again.



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    Re: [Cadence ADE XL] Optimize a Common Source Amplifier to 15dB gain via Corner Analy




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