NPN having its VBE protected against reverse voltage....but unecessary?

[treez]

Hi,
The attached circuits provide an 8.3V rail which supplies approx. 10mA.
The Left-hand version shows a diode D1, which is supposed to protect the NPN.
Our contractor tells us that this is essential. However, though I don’t like over-reverse-voltaging NPN Vbe junctions, I find this diode D1 to be unnecessary in this case, do you agree?

[barry]

I suppose if the output (emitter) is sitting at some positive voltage and the opamp output suddenly went to zero you’d have a reverse bias. But why don’t you ask your contractor to explain it? Aren’t you paying them for their expertise?

[dick_freebird]

The case where load is energized and then power is discharged
could apply damaging reverse bias to the NPN.

Low current reverse breakdown may only drift Vbe and cost low
current beta - hot carrier charging of emitter-adjacent oxides.

However I've done a fair number of circuits that use "zener zap"
as a trim method, and this consists of milliamps forced backward
across N+/P+ junctions (works well enough on N+/Pb if the base
contact is made close enough). This turns the diode into an
ohmic "short" permanently, as soon as you put enough energy
into the small volume you'll pull aluminum into the silicon (all
you need is for the silicon to hit the Al-Si eutectic temp, at
even the smallest weak spot). The op amp forcibly depowered
would have low enough reverse resistance (through ESD diode
or explicit output devices) to program the kind of zap-zeners
I use.

You can't guarantee a particular transistor won't "program"
at BVebo plus a skosh, as this is untested in production and
depends on random defects for the low-ruggedness outliers.
You might be able to build "population confidence" by adding
a reverse-emitter-breakdown current test at 20mA (this
ought to be comfortable margin against 12V/100 ohms) and
use delta-Vbe, delta-low-current-hFE criteria (say, less than
5% drift after some number of cycles representing power
cycle timing with a fat output decoupling bank like the user
might add externally).

But I expect that if you don't want to pay for a cheap little
diode, you don't want to pay for science projects either.
How many diodes does it take eliminating, to pay for a man
week of messing-about? Even if that messing-about pays
off?

[asdf44]

Other question: 12V to 8.3V at 10mA and you need this circuit?

You could:
Remove the NPN altogether and supply 10mA from the opamp directly
Remove the opamp too and supply 10mA from the TL431 shunt circuit

Or best: buy a single regulator IC that includes the reference

[Easy peasy]

the emitter base will zener at 6 - 7 volts the current limited by the 100E resistance and the output Z of the op amp assuming the emitter is held high by some external source

if no external power ( associated with the load ) - then the ckt is fine without the prot diode as it is simply an emitter follower ... there may be a brief reverse pulse into the E-B zener due to the cap on the o/p but this is negligible ....

[Easy peasy]

Oh yes - the 431 could control the npn directly producing the 8v3 @ 10mA ....

[KlausST]

Hi,

Or with even less components: use an adjustable voltage regulator.
Space saving, low cost...

Klaus

[treez]

Thanks, this is on the PCB now, which has been made, and we cant go back unfortunately.
Anyway, i think we will increase the base resistor to 3k3 (R172) to limit the base-emitter zener current (if it ever occurs)
I saw a video once where they show some electronics meters which actually use a base-emitter of an NPN as a zener diode for circuit protection...so it can't be that bad i am thinking, as Easy Peasy partially notes in his kind description above.

[std_match]

Thanks, this is on the PCB now, which has been made, and we cant go back unfortunately.
Anyway, i think we will increase the base resistor to 3k3 (R172) to limit the base-emitter zener current (if it ever occurs)
I saw a video once where they show some electronics meters which actually use a base-emitter of an NPN as a zener diode for circuit protection...so it can't be that bad i am thinking, as Easy Peasy partially notes in his kind description above.

I would never allow a transistor to go into "reverse VBE zener mode" unless that is the intended operation. It can permanently reduce the gain of the transistor, as dick_freebird mentions in post #3.
I would keep diode D1.

[Easy peasy]

Dear std_match, assuming the junction remains below 115 deg C how EXACTLY does zener operation reduce the gain of the device? natural drift or osmosis of dopants is generally temp dependent not reverse bias dependent ... ?

[dick_freebird]

Dear std_match, assuming the junction remains below 115 deg C how EXACTLY does zener operation reduce the gain of the device? natural drift or osmosis of dopants is generally temp dependent not reverse bias dependent ... ?

Pushing carriers acros the reverse breakdown potential makes
them "hot" electrically and they can leave the silicon and embed
holes or electrons in adjacent oxides.

This charging changes surface recombination behavior and "steals"
a portion of the base current, without collector gain, reducing the
terminal hFE. This is mostly at low Ic, Ib (the recombination term
is roughly fixed, so matters more at low currents). The beta-vs-Ic
curve becomes "peaky" when what you want is a fairly consistent
"flat top".

The "zener" itself is not causing the degradation, it's the act of
forcing the carriers backward across it and the hot carrier effects
of so doing.

Zeners designed for stability have a "buried" structure where the
active zener junction is entirely subsurface, and can't charge
an abutting oxide. Surface zeners, which are often opportunistic
arrangements of the emitter implants in IC technologies, are much
less stable and not used for reference products.

[treez]

This video discusses using an NPN as a clamping zener diode, via its reverse biased BE junction
https://www.youtube.com/watch?v=BGcK...ature=youtu.be

[Easy peasy]

Are there many oxides in a BJT ...? I would have thought not - in CMOS maybe ...

[dick_freebird]

BJTs still have the "field oxide" insulating the metallization
from silicon. CMOS adds the engineered thin oxide (active
area) as the gate insulator, a field oxide etch followed by
controlled growth (thickness, rate, chemistry).

[Easy peasy]

surely in a BJT the metallisation goes straight onto the Si, then if you want to protect the Al metal, you form an oxide on that, any non metallised Si can be oxidised - on the surface - but is there is not much near the junction in a planar device - in fact most of the junction is buried ... ?

[dick_freebird]

surely in a BJT the metallisation goes straight onto the Si, then if you want to protect the Al metal, you form an oxide on that, any non metallised Si can be oxidised - on the surface - but is there is not much near the junction in a planar device - in fact most of the junction is buried ... ?

The entire surface must be insulated. Consider the usual
vertical NPN. To get to the emitter, the centermost active
region, you must traverse isolation, collector and base.
If the surface were not generally ozidized you would short
all four. Because it is oxidized, you make contact cuts.

Even simple discrete devices will have field oxide and
contacts. Aside from the electrical insulation there is also
the need to exclude external contamination post-fabrication.

[Easy peasy]

you seem to be allowing my point - which is - by far most of the B-E junction is buried - away from any oxides ... ?

[dick_freebird]

The point of relative areas is semi-irrelevant. Inducing non-active
(usually) regions to "steal" base current from the region that
actually has current gain ruins low current beta, and "programming"
just needs one weak spot between emitter and base contacts with
lower breakdown than the junction bottom "plate".

More is worse, but only "none" is good (i.e. same as un-abused).

[treez]

Thanks , this is very interesting. I’ve now heard it from a few different sources that driving current through the VEBO (zener) is bad in that it degrades the hfe.
The thing is, it’s a question of how much it degrades it…..
…..If I make the R172 of the right-hand schem of the top post equal to 3k3, then that’s less than 1mA going through the zener, just until the 200nF on the output rail discharges down. Surely I am thinking sub 1mA is nothing, but I suppose the damage caused is cumulative?

[Easy peasy]

I have never seen a BJT fall to un-useable levels of gain through being OCCASIONALLY used as a zener, when it is used as a zener - the gain is often irrelevant.

Fluke use 2 x npn in an AC zener clamp arrangement in a lot of their meters - the gain is used as one of the devices has to be on for the clamp to work - an elegant ckt actually

- - - Updated - - -

sorry to harp on - but those carriers in avalanche won't be attracted, per se, to oxide regions, they will go from emitter to base, N to P type in an npn xtor - certainly avalanche & zener operation is energetic for the carriers but the suggestion they will punch through the receiving semiconductor and then on to the oxides ( at the fringes where the oxides exist ) seems ( to me at least ) to be overstated. However if the empirical evidence is there that the gain reduces after some use as a zener, I won't dispute it.