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Adding capacitor to Cgs in low side FET of sync Buck converter.

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treez

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Page 5 of the following says that when selecting the low-side FET in a synchronous buck converter, the Qgd/Qgs ratio should be as low as possible. It says that this is to reduce shoot-through due to spurious on-turning of the low side FET when the top fet turns ON. However, if this were the case, then all one would have to do would be to add a capacitor from gate-to-source of the low side FET. Wouldn’t you agree?

Sync Buck FET choice…
https://www.vishay.com/docs/68952/an836.pdf
 

If this were the only interest, then perhaps. But it never
is, is it?

Adding passive Cgs adds switching loss without improving
conduction loss. Adding enough to matter, may drive you
(heh) to a larger sized gate driver or leave you with no
good choices there, depending on how fat the FET already.

I think all the guidance is telling you, is to pick the best
C-ratio FET you can find for totem pole applications.
Not to add baggage.
 
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plenty of designers have tried that ( add Cgs cap ) with mixed results, for < 50kHz it kinda works, above 100kHz you now need a gruntier driver - may as well just put the gruntier driver in that holds the gate low when the drain is skyrocketing ...
 
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Consider that the low side FET is soft switching at both edges, gate drive speed isn't very critical unless you manage to eat up the dead time provided by the controller.

As mentioned before, external Cgs can be helpful only in a few cases, this time to compensate for insufficient clamping ability of the gate driver.
 

As FvM says the low side switch in a synch rect buck converter is soft switched ( except at zero load ) so the gate drive burden is lessened any ways ...
 

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