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    Detect the absence of sampled AC signal (from digital filter) in verilog

    I want to write a code for a system which detects the absence of AC signal ,received after the digital filter (sampled @ 200khz).
    My ideas
    1. level detector - If level is zero - no ac signal.(I liked it the most but struggling to come up with logic)

    2. Continuously measure frequency of signal,but would need to increment counter for 1 second ,then if the signal disappears I should be able to detect it immediately and not wait for one second to be over.

    3. Peak to peak voltage - No Ac signal means zero P-P voltage.

    4. edge detect the rise and fall - No edge will mean no ac signal but it will falsely detect during the time between edges.

    5. Use a DAC and analog circuit for detection.()

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    Re: Detect the absence of sampled AC signal (from digital filter) in verilog

    You'll ask for the channel noise spectrum and AC signal characteristic to decide about an optimal detection algorithm.



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    Re: Detect the absence of sampled AC signal (from digital filter) in verilog

    Hi,

    I canīt find a question ... and no problem.

    How can we help?

    Klaus
    Please donīt contact me via PM, because there is no time to respond to them. No friend requests. Thank you.



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    Re: Detect the absence of sampled AC signal (from digital filter) in verilog

    I wouldn't look at zero crossings because there will still be noise, perhaps AC mains pickup, when no signal is present. I've done this:

    AC Signal -> First order IIR low pass -> Absolute value -> Peak detector with timing window greater than a period -> Threshold comparison


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    Re: Detect the absence of sampled AC signal (from digital filter) in verilog

    thank you for your reply. I am new to this. I am designing the filter for 50 Khz and 39 Khz separately. So what should be the timing window period be ? Should it be greater than 1/ (50 k) and 1/ 39k respectively or something else?
    I was thinking to use a matched filter with peak finder. What do you think about that?



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    Re: Detect the absence of sampled AC signal (from digital filter) in verilog

    If your signal has enough amplitude I would think that using the level detection method should be the easiest; noise shouldn't be an issue. What is your problem with the logic? Nothing could be easier:

    If signal_amplitude<threshold==>NO SIGNAL

    You could do something as simple as look at the signal for a fixed amount of time (number of samples) and see if it exceeds the threshold.



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    Re: Detect the absence of sampled AC signal (from digital filter) in verilog

    Timing window can be anything greater than the period of the slowest signal in this case. I'm proposing a simple peak detector so it just needs to catch at least one peak. To be clear my logic is this:

    Code:
    if (signal_in>peak)
      peak<= signal_in
    
    if (period_strobe)
     peak_out<=peak;
     peak<=0;
    That's in a loop of course. Then compare peak_out to some threshold.

    There are other alternatives. If its a synchronous system where your clock is also generating your output then you could use various simplified frequency domain filtering techniques. Run a DFT at your known frequency of interest for example (actually quite simple to do).



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