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Design loop filters in a PLL circuit

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wangth1996

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I want to use a PLL circuit(@analog circuit) to generate error signal between two GHz signal sources. The analog circuit company provide an ADIsim software to design the loop filters. However, my purpose of using the PLL circuit is different that I do not use a vco in the circuit(the software include a VCO component as default). I use an arbitary function generator to generate a reference signal. So how should I determine the loop filters? If I still use the ADIsim software to simulate, ho should I configure the VCO part since I donnot use it?
Thanks for any suggestions and I will appreciate it.
 

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