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PMOS load switch circuit issue

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usama14

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Hi all. I'm working on a load switch circuit that drives a capacitive load of 1000uF and a GAN transistor in parallel. The schematic of the circuit is attached. The input voltage is 50V and the Pmos being used is IRF5210. The simulations show promising results(also catering the inrush currrent issue), but on the hardware, when the GAN is biased to -2.9V and the pulse is applied to the NPN transistor, the circuit turns on but draws the maximum current from the supply. Hence, the PMOS gets burned. The inrush current is limited to 0.4A max and the full load current can go upto 7A. fig1.png Any suggestions will be welcomed. Thankyou
 

How are you limiting the inrush? If, you REALLY are limiting the current through the PMOS to 0.4mA, then it shouldn't BURN UP. But that 120 ohm resistor ALONE will draw over 400mA. Your large 1000uF cap will also draw a huge inrush.
 

I guess you didn't simulate with device tolerances for example. This "limit circuit" doesn't look so stable. Resistor, supply, BJT beta factor, MOSFET Vth values are all depend from process, temperature. Open device datasheets and check min/max values, simulate again with those.
 

How are you limiting the inrush? If, you REALLY are limiting the current through the PMOS to 0.4mA, then it shouldn't BURN UP. But that 120 ohm resistor ALONE will draw over 400mA. Your large 1000uF cap will also draw a huge inrush.

Its mentioned here:
https://www.onsemi.com/pub/Collateral/AND9093-D.PDF

Also the 120 ohm load draws 0.4A and that is a stable current value, not inrush. The simulations show inrush of 0.3 to 0.4A max.

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I guess you didn't simulate with device tolerances for example. This "limit circuit" doesn't look so stable. Resistor, supply, BJT beta factor, MOSFET Vth values are all depend from process, temperature. Open device datasheets and check min/max values, simulate again with those.

Sorry I could'nt get your point, kindly explain a little.
The simulation I carried out has already taken care of the Vth, Vgs values. The min/max Vd and Id also have been taken into consideration.
 

Hi,
The FET Vth varies from 2V to 4V. This is huge variation, your circuit should be simulated with both threshold values. At least. But power consumption also depend on resistor tolerances.
Anyhow, the main issue is what barry mentioned, the 1000uF capacitor. Check this:

kzdz3pw.png


You can see when the BJT control voltage jumps up (red) the output voltage (blue) slowly begins to rise up. Meantime the 1000uF capacitor pulls current from the supply through the FET, and the overall power on the active device is very big (green) for a while. 12W under some hundred ms for this FET can be too much.
Furthermore when the maximum output load appears (7A at 600ms) the FET almost reaches its maximum rated power, without heatsink!
So...how is your heatsink?

I used an other FET in the simulation, here is your device's datasheet: http://www.redrok.com/MOSFET_IRF5210_-100V_-40A_60mO_Vth-4.0_TO-220.pdf
 

Ah I see. I am using a 1.2 x1.4cm heat sink.
You mentioned the "12W can be too much for this FET". Isnt the Mosfet IRF5210 rated for 200W at room temperature? So it should handle this? No? Correct me if I'm wrong kindly.
Also, what do you propose the solution then? How should I limit the current?

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Read the data sheet. It can dissipate 200w with a case temperature of 25 deg, not AMBIENT of 25 deg.
 

Read the data sheet. It can dissipate 200w with a case temperature of 25 deg, not AMBIENT of 25 deg.

Kindly guide me how much max power then this mosfet can bear with a heat sink?
 

You need to learn about thermal conductivity. We can’t give you an entire course, but you can ask specific questions.
 

Kindly guide me how much max power then this mosfet can bear with a heat sink?

It can dissipate 200W, but with intensive cooling. Use bigger heatsink and to reduce charging current use smaller capacitor values.
 

My circuit is working well after thorough testing uptill now with quite low heat dissipation. Thnx for ur kind inputs.
 

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