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What is Double Snapback Characteristics in High-Voltage nMOSFETs

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MubarakKhan

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I'm reading the attached document in that I didn't understand what is Snapback.
when I search about Snapback it shows some basketball caps.
 

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  • JP-50-3-897.pdf
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Snapback is in fact desirable and key to good NMOS-as-clamp
(or self-protection) ESD performance. You -want- a low holding
voltage (but greater than any spec load condition).

The other key is, the snapback current needs to be spread as
uniformly as possible ofer the device area. This wants drain
"ballasting" (distributed resistance, which the drain extension
may provide adequately or not; in my experience a silicide-block
(drain doped) resistive region, its length arrived at empirically
and width left to "be what it must, for threat level" is how the
device design unrolls.
 

what is Snapback.
Snapback - in this context - means the sudden receding of the voltage at a certain current, which generates a kink (or a knee) in the I-V characteristic of the device.
 

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