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  1. #1
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    Combine circuit and Verilog in Cadence

    Dear all,
    I have an ADC design in cadence virtuoso which is at transistor level. I would like to perform some operations on this output of the ADC. Is there anyway that i can write a verilog code (not verilog-a) to further process these output bits and combine that with my circuit designed in virtuoso?
    TIA

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  2. #2
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    Dominik Przyborowski's Avatar
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    Re: Combine circuit and Verilog in Cadence

    Yes, it is. Take interest in the mixed mode simulations. You will need an ams simulator. In virtuoso IC installation directory you should have documentation for it (you can find it directly from CIV, too)


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