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  1. #1
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    pcie hard ip altera- latency problem

    Hi,

    i'm writing a code to injection data to another board through PCIe.
    I'm doing it with Avalon MM master/slave.

    The parameters are:

    Burstcount- 10h
    Readdata -64b

    In the Avalon MM, when the read request asserted low then after numbers of clocks the readdatavalid goes high.
    After is we can start to read 64b data.

    Between the read request and the readatavalid we have ~134 clocks.
    Because this latency my SM stuck without receiving any data:(

    Thers is an option to decrease this latency?
    Maybe, to change parameters at the IP core? (i didn't find it at the datasheet but still keep searching)


    Thanks u all

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  2. #2
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    Re: pcie hard ip altera- latency problem

    I would say there is a problem with your state machine - why cant it cope with a large latency?



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  3. #3
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    Re: pcie hard ip altera- latency problem

    My state machine working great.

    I did simulation and not suffer with such a problem.

    If I increase the Burstcount to 64 bit, sometimes it's work and sometimes not.
    But still, I need to work with 16b transfer data



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  4. #4
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    Re: pcie hard ip altera- latency problem

    The latency can vary a lot in the real world, and it seems normal in your case. I think your state machine should be able to handle latencies up to about 10 us.



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