hybrid90
Newbie level 2
Hello,
I am in process of designing an LNA in ADS. I went through theory behind LNA design and now I understand the input and output matching circuits. However to do the schematic, let’s say for the input matching circuit for an LNA with inductive degeneration, what value of Lg and Ls I have to use? I guess it depends on the parasitic capacitances of my transistor as well. In that case how can I know how much is the parasitic capacitance?
I understand that I have to tune my Ls and Lg values so as to match the real part of impedance and cancel the imaginary part. But I don’t know where I have to start? How to choose the values?
Kindly advise... Thanks in advance...
I am in process of designing an LNA in ADS. I went through theory behind LNA design and now I understand the input and output matching circuits. However to do the schematic, let’s say for the input matching circuit for an LNA with inductive degeneration, what value of Lg and Ls I have to use? I guess it depends on the parasitic capacitances of my transistor as well. In that case how can I know how much is the parasitic capacitance?
I understand that I have to tune my Ls and Lg values so as to match the real part of impedance and cancel the imaginary part. But I don’t know where I have to start? How to choose the values?
Kindly advise... Thanks in advance...