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    ADC Sampling and Conversion Sequence

    I am not understanding the following concept of ADC sampling and conversion using external trigger. The micro i am referring to is dspic33EP256MC506. There is an external conversion trigger section which states the following
    "In an Automatic Sample and Triggered Conversion Sequence, sampling starts automatically after conversion and the conversion starts upon a trigger event from the selected peripheral".
    My question is how long does the sampling take place? Does it keeps sampling till the conversion trigger happens? I would like the sampling and conversion going together that is when trigger event happened i want to sample and convert. Please advise.
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    There is another section which explains this. So the application has to set the sampling start manually. Am I correct?

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    Last edited by electronicsman; 25th August 2019 at 04:23.

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  2. #2
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    Re: ADC Sampling and Conversion Sequence

    Hi,

    You are correct.
    * sampling begins after the last conversion ... until the external trigger
    * then sampling period ends and the conversion begins.

    I would like the sampling and conversion going together
    This is only because you don't understand what "sampling" means.
    "Sampling" time is the time when the "sampling capacitor" of a sample-and-hold circuit is connected (by an analog switch) with the analog input. During this time the capacitor is charged to the input voltage ... and the capacitor voltage follows the input voltage as long as the trigger signal becomes activated. Then the switch becomes high impedance and thus the voltage at the capacitor "freezes" = hold time = stable voltage during conversion.

    Klaus
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    Re: ADC Sampling and Conversion Sequence

    The ASAM with triggered conversion start scheme provides highest throughput and precise acquisition time control in multi channel applications. If you don't like it for some reason, you need to control things manually.

    You didn't tell however what's your problem with the suggested scheme. It may be just a misunderstanding.



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  4. #4
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    Re: ADC Sampling and Conversion Sequence

    Sorry for the delay in the response. Here is the timing diagram i have drawn in excel. I have doubt on the sampling time. Does the sampling time lasts so long? Please advise.
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  5. #5
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    Re: ADC Sampling and Conversion Sequence

    Does the sampling time lasts so long?
    With the given timing, yes. But it doesn't imply a problem. In sampling state, the ADC only tracks the input signal and holds the latest value when trigger occurs.



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  6. #6
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    Re: ADC Sampling and Conversion Sequence

    So, my final conclusion is that the holding circuit will keep tracking the input signal and it does not have a condition like minimum ADC conversion clock.
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