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    Verilog code for 8 bit register with read/write

    i wanted to drive data and address from axi slave to 8 bit register, anyone can help me out with code or logic

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    Re: Verilog code for 8 bit register with read/write

    There are numerous axi slave example codes in the net which can be re-used to suite your purpose. Have you tried them?

    If you have trouble understanding the protocol, see this vdo - https://www.youtube.com/watch?v=meQcwzC4Vtk
    FPGA enthusiast!



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    Re: Verilog code for 8 bit register with read/write

    i'll go through video.



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    Re: Verilog code for 8 bit register with read/write

    If you are using Vivado there is an example slave design for AXI that you can have the tools generate.

    You can also download any of the AMBA spec free after signing up on the ARM website.



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    Re: Verilog code for 8 bit register with read/write

    sorry not using vivado.



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    Re: Verilog code for 8 bit register with read/write

    i wanted to drive data and address from axi slave to 8 bit register, anyone can help me out with code or logic
    I hope you realize that in order to have data from an axi slave to a 8 bit register, the 8 bit register must also have an axi wrapper. That axi wrapper must act as an axi master. Since you already have the slave you need to write the axi master RTL.
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    Re: Verilog code for 8 bit register with read/write

    Quote Originally Posted by dpaul View Post
    I hope you realize that in order to have data from an axi slave to a 8 bit register, the 8 bit register must also have an axi wrapper. That axi wrapper must act as an axi master. Since you already have the slave you need to write the axi master RTL.
    I figured the OP meant they wanted to connect an 8-bit register to an AXI slave interface, but doesn't understand how to do that.

    i.e. AXI master ==> AXI slave ==> 8-bit register

    A quick search on google results in one of the first links being this example design.

    Didn't look to closely at it, but it looks reasonable.


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