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  1. #1
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    Input DC offset result output dc value reach vdd

    Hi,

    I'm designing a fully differential amplifier. My block include a amplifier 30dB gain open loop and a common mode feedback circuit with 20dB gain.

    when the input have dc offset (0.1V), it saturate the output, so one output port of differential amplifier's voltage reach VDD, which is turned off.

    I think the common mode feedback should correct the dc output voltage, but it didn't work. Could someone tell me how should I prevent this happen? should i increase gain of common mode fb block?

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  2. #2
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    Re: Input DC offset result output dc value reach vdd

    Show your simulation circuit testbench. It should resemble the
    datasheet application figure for a similar function IC part.

    Jam the outputs together and sweep them rail-rail with a vdc
    source. Look at the output of your CMFB block. Does it "switch"
    at about the right VCM and does it switch in a direction that
    would oppose?

    30dB is not great for voltage gain - not even A=100. Not even
    acceptably accurate for many A=10 closed loop applications.
    Aim higher.

    But an imposed input offset -should- rail out any amplifier worth
    more than an empty package. CMFB may be satisfied with one
    output railed high and one railed low.



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    Re: Input DC offset result output dc value reach vdd

    It's not the purpose of CMFB to correct input offset. Use differential feedback.



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  4. #4
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    Re: Input DC offset result output dc value reach vdd

    I planed to use open loop, that's why I only set gain to be 30dB. Will the close loop give me higher linearity?



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    Re: Input DC offset result output dc value reach vdd

    Closed loop in an application-realistic circuit is going to
    put everything where it should normally be (or else you
    have work to do). You don't get much usable info from
    an amplifier that's got railed outputs and wound up gain
    stage(s).


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    Re: Input DC offset result output dc value reach vdd

    A gain of 30dB, which is about 40V/V will produce diff output of abut 4V for an offset of 0.1V. If your supply voltage is below that value or about that value, the amplifier will saturate to the rails. Offset is a kind of differential signal, producing differential output and thus is not affected by the CMFB.



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  7. #7
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    Re: Input DC offset result output dc value reach vdd

    Quote Originally Posted by dick_freebird View Post
    Closed loop in an application-realistic circuit is going to
    put everything where it should normally be (or else you
    have work to do). You don't get much usable info from
    an amplifier that's got railed outputs and wound up gain
    stage(s).
    My input voltage is pretty small, so 30dB will not distort the signal. My first design was close loop, but the bandwidth is not enough because of the feedback and phase margin. I thought the open loop don't need to consider about the phase margin, which could lead me have more bandwidth. Do I need to consider the phase margin issue in open loop circuit when there is no differential feedback?



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    Re: Input DC offset result output dc value reach vdd

    Quote Originally Posted by SDRookie View Post
    My input voltage is pretty small, so 30dB will not distort the signal. My first design was close loop, but the bandwidth is not enough because of the feedback and phase margin. I thought the open loop don't need to consider about the phase margin, which could lead me have more bandwidth. Do I need to consider the phase margin issue in open loop circuit when there is no differential feedback?
    No, you don't


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