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    How to measure the input reactance and output reactance of a MOSFET/gain stage

    Hi, I found relative answers to the question but I want a little clarity.
    https://www.edaboard.com/showthread....ce-of-a-MOSFET
    https://www.edaboard.com/showthread....nput-impedance
    https://www.edaboard.com/showthread....nce-calculator
    https://www.edaboard.com/showthread....or-(SpectreRF)

    I mentioned it as reactance as a general case but I know it is mostly capacitance. How do I find input/output capacitance of a gain stage/MOSFET/Network?. Usually it is the imaginary part of the total input/output impedance. So If I do SP simulation and plot the imaginary part of ZP from direct plot, It will give me the input/output capacitance of a gain stage. Correct? But why do some people use YP from direct plot for this purpose. I just want to know which parameter to use (Say ZP) and what modifications I should make if I use the other parameters(Say YP).

    P.S I know if the network has series connection it is easier to use Z parameters and If it is parallel connections it is easier to use Y parameters. But If we consider the network as a block box we wouldn't know how the connections are inside.

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    Re: How to measure the input reactance and output reactance of a MOSFET/gain stage

    Quote Originally Posted by circuitslave View Post
    So If I do SP simulation
    You should not use S-parameters, since you can not understand RF.

    Quote Originally Posted by circuitslave View Post
    and plot the imaginary part of ZP from direct plot,
    It will give me the input/output capacitance of a gain stage.
    Correct?
    Open state.

    Quote Originally Posted by circuitslave View Post
    But why do some people use YP from direct plot for this purpose.
    Short state.

    Consider a definition of Z11 and Y11.

    Quote Originally Posted by circuitslave View Post
    I just want to know which parameter to use (Say ZP)
    and what modifications I should make if I use the other parameters(Say YP).
    Surely learn a definition of Z and Y parameters.

    Quote Originally Posted by circuitslave View Post
    But If we consider the network as a block box we wouldn't know how the connections are inside.
    It is very easy linear algebra whatever you use as 2-port parameters.
    Last edited by pancho_hideboo; 26th July 2019 at 15:51.



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    Re: How to measure the input reactance and output reactance of a MOSFET/gain stage

    Quote Originally Posted by circuitking View Post
    Hi, I found relative answers to the question but I want a little clarity.
    https://www.edaboard.com/showthread....ce-of-a-MOSFET
    https://www.edaboard.com/showthread....nput-impedance
    https://www.edaboard.com/showthread....nce-calculator
    https://www.edaboard.com/showthread....or-(SpectreRF)

    I mentioned it as reactance as a general case but I know it is mostly capacitance. How do I find input/output capacitance of a gain stage/MOSFET/Network?. Usually it is the imaginary part of the total input/output impedance. So If I do SP simulation and plot the imaginary part of ZP from direct plot
    No.. If you are interested in the input impedance, look at ZM1 and for output impedance, look at ZM2. Not Z parameters. V1 = Z11*I1 + Z12*I2. If you only look at Z11, then you don't see the effect of Z12 which is the effect of the feedforward capacitance (aka Cgd). ZM1 captures both of them.



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    Re: How to measure the input reactance and output reactance of a MOSFET/gain stage

    Hi,

    In my eyes the miller effect makes the system unlinear, you see this in the voltage plateau of V_gs.
    Thus you can't apply S parameters.

    You need to input power to get the gate charged. ... but you don't get the whole power back, because all the power for the miller effect is dissipated within the Mosfet.
    It is a lossy unlinear system, depending on V_DS...and can't be simulated with an R C circuit.

    Klaus
    Please don´t contact me via PM, because there is no time to respond to them. No friend requests. Thank you.



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    Re: How to measure the input reactance and output reactance of a MOSFET/gain stage

    Quote Originally Posted by vivekroy View Post
    No.. If you are interested in the input impedance, look at ZM1 and for output impedance, look at ZM2. Not Z parameters. V1 = Z11*I1 + Z12*I2. If you only look at Z11, then you don't see the effect of Z12 which is the effect of the feedforward capacitance (aka Cgd). ZM1 captures both of them.
    Yeah sure.
    I used this
    1.CinfromY=(1 / (abs(imag((1 / ypm('sp 1 1)))) * 6.28 * xval(ypm('sp 1 1))))
    2.Cin=(abs(imag(zm(1 ?result "sp"))) / (2 * 3.14 * xval(zm(1 ?result "sp"))))

    There is a lot of difference between two of the results and using 2. the Cin value is not constant over the frequency range. That is the my confusion as to which one to use and the Cgd effect would so much ?

    Click image for larger version. 

Name:	Cin.JPG 
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ID:	154599



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    Re: How to measure the input reactance and output reactance of a MOSFET/gain stage

    Quote Originally Posted by circuitking View Post
    Yeah sure.
    I used this
    1.CinfromY=(1 / (abs(imag((1 / ypm('sp 1 1)))) * 6.28 * xval(ypm('sp 1 1))))
    2.Cin=(abs(imag(zm(1 ?result "sp"))) / (2 * 3.14 * xval(zm(1 ?result "sp"))))

    There is a lot of difference between two of the results and using 2. the Cin value is not constant over the frequency range. That is the my confusion as to which one to use and the Cgd effect would so much ?

    Click image for larger version. 

Name:	Cin.JPG 
Views:	5 
Size:	276.2 KB 
ID:	154599
    The expression for Cin is incorrect.
    Xc = abs(1/imag(1/zm(1 ?result "sp")) )
    Cin = 1 / (Xc*(2*3.14159*xval(zm(1 ?result "sp"))))

    Xc = 1/jwC ==> C = 1/(j*w*Xc)

    This Cin is Cgs + Av*Cgd


    You can check this value at very low frequencies. Your Cin is in nF which is really high.



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    Re: How to measure the input reactance and output reactance of a MOSFET/gain stage

    Quote Originally Posted by circuitslave View Post
    Yeah sure.
    Are you truely sure ?

    Quote Originally Posted by circuitslave View Post
    1.CinfromY=(1 / (abs(imag((1 / ypm('sp 1 1)))) * 6.28 * xval(ypm('sp 1 1))))
    Very wrong. Can you understand imag(1/admittance) ?

    Quote Originally Posted by circuitslave View Post
    2.Cin=(abs(imag(zm(1 ?result "sp"))) / (2 * 3.14 * xval(zm(1 ?result "sp"))))
    Very wrong. Can you understand imag(impedance) ?

    Quote Originally Posted by circuitslave View Post
    There is a lot of difference between two of the results and using 2.
    It is a very natural result.

    Quote Originally Posted by circuitslave View Post
    the Cin value is not constant over the frequency range.
    It is a very natural result.

    Quote Originally Posted by circuitslave View Post
    That is the my confusion as to which one to use and the Cgd effect would so much ?
    Both are very very very very wrong.
    Simply you can not understand impedance and admittance at all.

    Surely learn a definition of Z and Y parameters.

    Y11 is a short state admittance.
    Z11 is a open state impedance
    ZM1 is a loaded impedance where load impedance value is reference impedance.

    Quote Originally Posted by vivekroy View Post
    If you only look at Z11,
    then you don't see the effect of Z12 which is the effect of the feedforward capacitance (aka Cgd).
    Wrong.

    Z11 surely includes the effect of Cgd due to intrinsic load.

    Quote Originally Posted by vivekroy View Post
    The expression for Cin is incorrect.
    Xc = abs(1/imag(1/zm(1 ?result "sp")) )
    Cin = 1 / (Xc*(2*3.14159*xval(zm(1 ?result "sp"))))
    I don't think Yin=1/zm(1 ?result "sp") is not appropriate, since circuitslave can not understand S-parameters at all.

    I don't think reference impedance is matched to actual load resistance.

    Quote Originally Posted by circuitslave View Post
    So If I do SP simulation
    Show me reference impedance and load impedance.
    Last edited by pancho_hideboo; 27th July 2019 at 17:18.



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  8. #8
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    Re: How to measure the input reactance and output reactance of a MOSFET/gain stage

    Z11 surely includes the effect of Cgd due to intrinsic load.
    Yes.. I see your point. I understand my mistake. Y11 = jw(Cgs+Cgd) (because the output would be shorted and both capacitances would come in parallel). Z11 expression will be longer but it will include the effect of Cgd. I apologize for misleading.



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    Re: How to measure the input reactance and output reactance of a MOSFET/gain stage

    Quote Originally Posted by KlausST View Post
    Hi,


    Thus you can't apply S parameters.

    Klaus
    Then how do you find the input/output capacitances ?

    - - - Updated - - -

    Quote Originally Posted by vivekroy View Post
    The expression for Cin is incorrect.
    Thanks for correction.
    So you suggest I use Zm instead of ZP. To me also Zm makes sense.



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