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  1. #1
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    Inrush pulse in FET in offline SMPS....gradual degradation?

    Hello,
    We suffer the attached inrush pulse (VDS and IDS) into the FET M1, which is IPP90R1K2C3.
    LTspice sim also attached.
    (it’s the input stage to an offline smps)
    The inrush happens every time the product is switched on, and the product is switched on once per day.
    The SOA graph on page 4 of the datasheet suggests the fet can handle 660V at 3.2A for 10us………that’s the kind of “nearest comparison” that we can make for our situation….but its not really applicable to our actual inrush waveform as attached.
    Our inrush VDS and IDS waveforms are oscillatory and so not easily analysed by the table on page 4. However, it looks to me that our “effective” inrush pulse (one that is applicable to the SOA graph) is effectively 350V at 2.5A for 10us….and this is within the SOA.
    Would you agree that we should be OK with this FET?......or, say in 10 years time, will there start to be failures induced by this?

    IPP90R1K2C3 datasheet
    https://www.infineon.com/dgdl/Infine...23a89fe8085c04

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  2. #2
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    Re: Inrush pulse in FET in offline SMPS....gradual degradation?

    If the datasheet says it's ok, and your measurements are correct, then why the doubt?


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