Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Bypass dc signal which is accompanied with a low frequency sinusoidal signal

Status
Not open for further replies.
B

baby_2

Advanced Member level 4
Joined
Jul 20, 2016
Messages
105
Helped
2
Reputation
4
Reaction score
1
Trophy points
18
Activity points
873
Hi,
I have two signals that I need to block one of them (DC signal). The input signal is something like this:

Vin=VDC+Vac*Sin(2*pi*5*t)

1 millivolt<VDC<5 millivolt , .01 millivolt<Vac<.05 millivolt

I wanted to use a series capacitor for blocking but based on the low ac input frequency (5 Hz) it makes my capacitor very big. what is your suggestion for rejecting the VDC?
 

Strictly speaking you need large time constant, not necessarily large capacitor. You should talk about circuit impedance first. What's the load receiving the AC signal?
 

Thank you for your response. This signal is output of a mixer which is going to connect to an op-amp( in buffer configuration)
 

Now depends on the settling time you need. For settling time = 0.5 seconds, a 16nF cap and 10 Meg resistor. Do not push too much the settling time, otherwise you will attenuate your AC signal.
 

Since you are feeding into an opamp buffer config, then presumably the input impedance is >> 1Mohm even for a non-FET input opamp.
Here even a 5uF capacitor should provide you a decent DC block with less than 1% attenuation of your signal.

Of course if there are other elements in your circuit which you have not mentioned, then this result could be different.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top