Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

[SOLVED] Error during clock tree synthesis in innovus

Status
Not open for further replies.
C

Chinmaye

Full Member level 3
Joined
Jan 18, 2016
Messages
164
Helped
0
Reputation
0
Reaction score
1
Trophy points
1,298
Activity points
3,145
Dear all,
I am new to innovus tool. I get this error during clock tree synthesis.
ERROR: (IMPCCOPT-2215): The route/traversal graph for net 'clk' is not fully connected
What does it mean and how can it be solved?
 
Last edited by a moderator:

This problem automatically got solved when i run nanoRoute command
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top