Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

problem when zooming to see layers

Status
Not open for further replies.

abdoboua

Junior Member level 1
Joined
Mar 15, 2019
Messages
17
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
138
Layout problem when trying to see layers

When I try to zoom in order to see the layers of the device ,I tried to increase stop in options > display but it shows me a box with a cross on it.your help appreciated

display_stop_increased.png

results.png

first.png
 

Re: Layout problem when trying to see layers

Those boxes with "X" fill are saying that it can't
find the contents.

Property-edit them, see what library it thinks it's
looking for, then check your library list (Library
Manager) and see whether the library is defined
and if so, that there's "stuff" under the directory
location
 

Re: Layout problem when trying to see layers

Increase Stop level..
 

Re: Layout problem when trying to see layers

when I increase it, I get the "X" fill . I am using this 45nm technology : NCSU-FreePDK45-1.4.tar
 

Re: Layout problem when trying to see layers

Yes, because you are trying to see "stuff that isn't there"
(or, stuff that isn't anywhere Cadence knows to look).
Do what I told you. Property-edit the "X" blocks, see
what they are and where their library directory is (or
is supposed to be).

Problems can also include a switch-view, stop-view
"misalignment" between what Cadence looks for, and
what the kit provides.
 

Re: Layout problem when trying to see layers

I tried to do what you have said, but I don't know exactly the properties to add, chould I modify cell properties or instance properties. Thank you for your help. first.pngsecond.pngthird.pngfourth.pngfifth.png
 

Re: Layout problem when trying to see layers

I have a warning in WIC of cadence when adding a pmos_vtl to my layout, it says that :
The Pcell super master: NCSU_TechLib_FreePDK45/pmos_vtl/layout is not a SKILL super master.
The usage of non-SKILL Pcells in Virtuoso is not a supported feature.

Is it a serious problem, because when I try to vieww deep layers of my instance by increasing the stop level I get a X fill, Can it be the source of the problem.Your help appreciatedsixth.png
 

When I try to zoom in order to see the layers of the device ,I tried to increase stop in options > display but it shows me a " X " fill. I tried to change properties, but I don't know exactly the properties to add, chould I modify cell properties or instance properties.

Also ,I have a warning in WIC of cadence when adding a pmos_vtl to my layout, it says that :
The Pcell super master: NCSU_TechLib_FreePDK45/pmos_vtl/layout is not a SKILL super master.
The usage of non-SKILL Pcells in Virtuoso is not a supported feature.your help appreciated

first.png

second.png

third.png

fourth.png

fifth.png

sixth.png
 
Last edited by a moderator:

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top