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how to eliminate oscilation in current measuring circuit ?

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anotherbrick

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hello dear forum

devre.jpg

I try to measure output current of 28 KHz half bridge inverter with current transformer
the 1. opamp amplify current transformer output 2. opamp pass only positive alternance
the opamps are single supply the 7805 as voltage divider for amplifying negative signal by 1. opamp - I have put 10 uF 100 nF baypass caps to output of 7805 - no help
the opamps in the real circuit are AD8065 fast opamps

my problem ; if I connect current trasformer to the opamp circuit there is oscillation on top of current signal of CT - more interesting the oscillation is there only when the high MOS of inverter is ON
if I dont connect CT to opamp circuit there is no oscillation
also I have put damping resistor and 1 nF cap paralel to CT output - no help

my question how can I eliminate this oscillation ?

thank you
 

Hi,

Please show the complete schematic with all correct informations...otherwise it just causes confusion.

Especially for fast OPAMPs and fast signals you need a proper GND concept (usually a GND plane) and you need to install power supply bypass capacitors as close as possible to the OPAMP pins.
Also some kind of filter could help.
Don´t let the OPAMP go into saturation.

Klaus
 
Oscillation may happen due to poor winding coupling of CT or due to connections in bread board or long cable in the high frequency switching path.

Try with a standard CT and PCB
 
You're doing something wrong..
You measure a current and you couple 2 OpAmps on a poor breadboard with components mounted "space technique" .OpAmps are very sensitive components due to their high gain.They are also a potential victim against noises coming from anywhere..
I strongly recommend you use a real 2 sided PCB with a proper GND connection and good layout.Otherwise it will oscillate, measurement will be erroneously.
 
I finally got rid of oscillations at Current Transformer amplifier output
I put baypass caps at Opamp power supply pins
and 100 pF caps between (-) and (out) pins

my scheme is a simple half bridge inverter circuit for driving ultrasonic transducer
ultrasonic scheme.JPG

in this video I show driving puls of high MOS and the CT amplifier circuit output

in the beginning of the video the inverter starts with increasing the duty to %50 from %5
it waits 3 second and then it decreases the inverter frequency from 28.5 Khz to 26.5 Khz
in 1 second

my question ; why is the zero crossing of current signal always the same with the
edges of High MOS driving signal ? it seems that the current signal is forced to zero at the edges of MOS driving signal

( my amplifier circuit takes the positive alternance of CT signal )

the ultrasonic transducer is a capacitive and inductive and resistive device
I think that at some frequencies the current must lead or lag the High MOS signal , isn't ?

thank you
 

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