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LC VCO with Capacitor filter, what is the cap doing?

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mvj

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Hi,
VCOcoreSimple.png
The circuit in the picture is a complementary (NMOS & PMOS) Negative resistance core of an LC VCO. L, C and varactor are OFF-CHIP components connected across pins (IP,IP1B) and (IP1,IPB). The supply is a regulator output VREG and current in the oscillator is determined by resistors connected at top and bottom of the Negative resistance core. There is a capacitor (circled) connected across the common source point of PMOS and NMOS devices. This is what I am not sure of. I notice a significant improvement in phase noise for certain range of cap values. Below and above this range the phase noise degrades. My understanding is that this is some sort of a noise trap at twice the VCO oscialltion freq. Usually such a capacitor is accompanied by an inductor and the both resonate at twice the VCO freq and I don’t see any inductor here. May I know how this cap is helping improve phase noise and how to determine its value.

Thank you,
mvj
 

Since you use an ideal voltage source, how this cap improves the PN ?? If you used a noisy-real voltage source, I could understand the filtering function of that cap but you didn't..
I believe there is a loop/cap forms a loop with a -unknown/unseen- filter in VCO. It's just a guess but I'm not sure..
 

Thank you for your inputs!! I have actually removed some of the circuitry in an attempt to keep it simple and not over crowd it. There is actually
1. Bandgap voltage reference generator providing reference to a
2. voltage regulator with about 20pF on chip output capacitor (no off chip capacitor present) and the output (VREG) of this regulator is applied to
3. the oscillator.
The capacitor in question seems to be filtering a lot of flicker noise from bandgap, regulator and VCO core transistors when i look at noise summary from phase noise sim. But, like i said, I am not sure how this happening that to for a certain range of cap values.

Thank you!!
 

The capacitor helps reduce phase noise by providing class-C operation to your VCO.
In class-B, each section conducts current for half the time (180deg) whereas in class-C, the conduction angle is much less (say 100deg). In class-C current consumption of your VCO would rise greatly around the voltage peaks but mostly remain zero at all other times while displaying same average of class-B operation. This allows less phase noise upconversion from bias current(which depends on current at zero crossings that is made low now) in addition to increasing the oscillation amplitude level (due to higher current peaks at max swing). This provides for 2x benefit in phase noise. This is covered in literature widely.
Note however that this benefit is lost when even one of the cross coupled transistors enter triode. In fact it becomes worse than not having a capacitor at all!
 
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    mvj

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Thank you for the explanation!! Can you please mention any papers that talk about this. May I know why/how phase noise improvement happens only for a small range of capacitor values; above and below this cap range the phase noise degrades.

Thank you!!
 

Thank you for the explanation!! Can you please mention any papers that talk about this. May I know why/how phase noise improvement happens only for a small range of capacitor values; above and below this cap range the phase noise degrades.

Thank you!!

[FONT=&quot]A. Mazzanti and P. Andreani, "Class-C Harmonic CMOS VCOs, With a General Result on Phase Noise," in [/FONT]IEEE Journal of Solid-State Circuits[FONT=&quot], vol. 43, no. 12, pp. 2716-2729, Dec. 2008.[/FONT]
 
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    mvj

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Thank you for the explanation!! Can you please mention any papers that talk about this. May I know why/how phase noise improvement happens only for a small range of capacitor values; above and below this cap range the phase noise degrades.

Thank you!!

As you increase the capacitor value, the amplitude peak increases (for the same tail current). This could push the cross coupled transistor in to triode. In fact if the rds of these transistors reduce below certain value that reduces the effective Q of the tank(before they get in to triode), you will start to see the degradation in phase noise. Even if this rds reduction is only for a small fraction of the oscillation period the phase noise could get worse compared to not having any capacitor at all.
This phenomenon could be understood from different perspectives
1. Reduction in oscillation amplitude - As the transistor enters triode, tail node starts to move towards the peak and vice versa
2. Tank Q reduction
3. Wasting current when it is not needed results in less current spent on amplitude - for a fixed tail current
4. The Vgs for the off transistor (when the other transistor is in triode) becomes too negative than what it would be when they dont enter triode, with the same current and tank capacitance to recover and reach the peak - the amplitude gets limited

The easiest way to observe this is to look at the tail voltage. Class-C provides best results(FoM) when there are only two peaks in the tail voltage - i.e when the two transistors only move between cutoff and saturation. When the degradation starts, 4 peaks start to appear at the tail voltage.

In the paper vivekroy mentioned, read section III-C for the popular explanation
 
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