Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Run Veriloga demo in hspice 2013.03-SP2 error

Status
Not open for further replies.
Y

yyy963741tw

Newbie level 4
Joined
May 22, 2019
Messages
5
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
35
I run the demo file "resistor.sp" from /usr/cad/hspice/cur/hspcie/demo/hspice/veriloga
have this error:
**error** call to epvaHDLinit failed.
**error** Failed to read Verilog-A file, see <design>.valog file for details.
**error** (resistor.sp:3) difficulty in reading input
Click to expand...

and the "resistor.valog":*pvaE*please invoke hspice script instead of binary

I don't know how to solve it? I run other spice file without veriloga module successfully

未命名.jpg
未命名2.jpg
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top