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Pin definition in TSMC 0.18um

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Hello,

I have a question towards the pin definition on a poly net. As a simple example when I have a layout of the inverter and define a pin for its gate which has been connected by poly, it will not recognize by the LVS check as the port. However, it is obvious as the pin in the Navigator Windows of the layout editor. Just I should create an M1-Poly Via and after that define a pin by M1. I had not any problem with our past PDK like Xfab and AMS.

I would be appreciated to tell me what should I do for that? What's your suggestion?

Best,
 

What is the description of the LVs error you are getting? Did you forget to place a label on that pin, on the same layer? I believe calibre requires a label to pass LVS. I’ve never connected a pin in poly before, so I’m not sure if that’s part of the issue or not.
 

Hello,
Yes I did that. The error just related to pin of poly (missing port A; which is defined as poly pin). I think in TSMC PDK we just can use of metal to pin definition...
 

Sounds like it’s not recognizing the pin as a valid pin. Does the metal pin work when you via up to it? If the pin is on poly | pin and the label is on poly| label, I’m not sure what else could be the issue other than this particular pdk not allowing that connection.

Why are you making the input connection in poly? Even though it’s typically salicided poly, you will get a more ohmic contact on metal layers which will reduce your time constants.
 

Yes, it works.
But as I said just it cannot recognize the poly pin. I totally agree with you which using metal is more convenient than poly, but in some cases in a short distance and limited space it is better to use poly for connection. Because you need to two poly-Metal contact on the gates and they takes space (in very short distance is my mean.)
 

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