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[SOLVED] Best topology DCDC adjustable output

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for your new ckt choke needed only in the neg line, you diodes will have to be 1200V at least due to rev rec spikes - 2 x 800V in series recommended- snubbers across each.

split up you feedback resistors - so that if one fails short it won't kill every thing else, e.g. 220k x 5 at 1W each ( or higher )

you need another volt feedback loop for safety if one fails.

a 5 sec soft start would be useful - and a lot safer

I cannot see where the power comes from to drive the opto led ...? from the o/p is a bad idea - put another isolated wdg on the tx - or another small tx driven of the fet drains - to supply o/p aux power ...
 

Are you saying only one choke total? So between the caps? In that case, the single choke would be used for both waves?
 

the choke that goes to the mid point of the o/p caps - correct ...

Sensing Vout from the midpoint is a bad idea.

a 10E resistor to each gate after the 33 ohm is also a good idea for fets in parallel.
 
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Ah, yes, the idea behind safety was to use a comparator and look for >1KV or 10% FB variation and opto over and shutdown the PWM.

In regards to the now single choke, won't sharing it like that cause some major spikes? Will current keep flowing in one direction upon transition and suddenly be pushed in the other direction, resulting in major spikes? Or is my understanding of BH curves not correct with chokes....

Also, now that around 40 ohms of gate resistance exists, I'm considering removing the driver IC. The uc3846 is 1A totem, and this setup uses 1/4 of that. What do you think?

You also mentioned some months back adding 1u caps "near the fets," but did not grasp where. Drains to 24V? across DS? When doing math for snubbing, this came up again.
 

Try and put at least 4u7 from the CT, centre tap, of the LV side to gnd, this wdg should be near the fets, this gives turn off current some where to go until it can reach the big electro's ( which have plenty of ESL )

Buffering that chip for gate drive is a good idea - otherwise you need to add good schottkies to the chip o/p - see data sheet and app notes for this device.

Any choke on the o/p will cause spikes in the diodes - hence snubbers needed - turning fets on slower helps alleviate this

put a back diode across the 30 ohm, schottky, to give a quicker turn off, leaving the 10E to each fet. Make sure the fets are well heatsunk.

Double up your Vout feedback ckt as well as other over volt stop protection

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Snubbers, for fets: 6.8E ( 2W diss, so 3 x 22 ohm 2W in parallel) and 15nF ( 200V ) across each fet - for 50kHz


diodes: 150pF 1500V ( or 2 x 330pf, 1kV in series ) and 1200 ohm ( 10 watt, so 5 x 6k8, 2W in // ) across each diode

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get rid of the 1uF to the drains ( that go to Vcc )

put 1uF across the 0.01E shunt ( right on it with short wires )
 

Your snubbers are more aggressive then my math(included on dwg). Probably a good thing given assembly quality and bad assumptions. All changes now updated on dwg. Hopefully all your feedback is properly reflected now. Time to build this thing! I'm going to make a 100V version first to prove functionality, then go from there.

PS7.jpg
 

Just a note on reading english, 10 ohm to each fet means just that, not a fet pair, similarly for fet snubbers, 15nF & 6.8 ohm across each fet, not fet pair.

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pins 6&7 need to be shorted on the IC, the control loop is on the opto, higher Z r's to pin 1, and 22uf to give a decent soft start, 470E in series with the 22uF

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opto output goes to pin 5

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and invert the control such that when output goes high pin 5 goes low, btw 2pF is a nonsense value ... of no effect in this ckt
 
control loop / feedback components / freq comp - should all be done on the LT4430, main control IC should be unity follower.

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bias pin 5 to 2V5 from the 5v1 ref ( using 2 x 4k7 res's for e.g.) and use the opto xtor to pull pin 5 down.

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what happens if your 25k pot goes open ckt? - the Vout will fly up - the pot is on the sec side - is that safe? Is the 15v you propose to use for the sec side control simply shipped over from the LV side? The output is hardly isolated then, is it? - it has a common 0v.
 
Good points, did not notice the redundant comp. The 2nd side 15V is coming from a DCDC isolated module and the 25K pot is an industrial rotary dial with 1M isolation. My idea for backup voltage regulation ckt is to use an lm393 to opto latch the shutdown pin to the uc3846. It does not serve as a backup regulation though, just a 1KV shutdown.

The diagram has been fully expanded to show all passives. The over-voltage section still under dev. You have made detailed contributions on the FET gate layout, comp and snubbing. Hopefully this now shows it? The 100p decouplers on the comp network are my concerns for RF noise. Loads will be between 30 to 100hz and can voltage sag. The goal is to start out over damped and stable and work up. The comp components were chosen at a 1 khz pass though, maybe too aggressive... What do you think?

PS8.jpg
 

your 50k res across the o/p caps need to be 10W, better to make them 220k ( 3W ) each

just write, snubber per each fet on the fet snubber components. i.e. 15nF & 3//220R on EACH fet ...!

I cannot see any slope comp in the control ckt ...!

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on the 4N35, emitter goes to gnd, collector to pin 5 ...
 
100nF on the 25k pot is a bad idea as it introduces too much delay in the volt loop.

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why is there a diode in the opto led drive ...?

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as you vary the 25k pot you vary the gain of the feedback loop - as it feeds straight into the inverting pin of the controller - or rather it should, your schematic appears wrong in this particular.

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to get the sense right - and the f/b to work properly, put a pnp from pin 5 to gnd ( emitter to pin 5 ) and pull up the base with your existing opto ckt - have a 10k from the pnp base to gnd to allow pin 5 to be fully pulled to gnd when the opto is off ( well 0.6 above gnd - but close enough ) the ckt as drawn won't allow this ( i.e. pin 5 going to gnd )
 
That diode on the LED drive appears in many examples, so added it. It seems benign, but maybe not. Comp was originally done twice by mistake. So you said to do it on the LT4430 and forward. The LT side comp is still there. With the new addition of the pnp, should more comp be done on the primary side?

The LT4430 reference input layout was taken from the doc example. That pin is the inverting input to the .6V internal ref. The dial can be labeled to adjust either way, but if there is functional issues, what are you seeing wrong?

PS9.jpg
 

Pin 5 still needs to be biased to 3v5 from the 5v1 pin, else the pnp has no volts to pull down on.

take the 100k off the base of the opto - discard, if you must put something on the base try 100pF to gnd.

Your 100k res across the 500V caps dissipate 2w5 at 500V they had better be 5W resistors ...!

When the pot is set to 25k-ohm the HF gain in the 4430 is 50k/25k = 2, when the pot is set to 1k, the HF gain is 50, i.e. likely to be unstable

this is why professional designs don't have the pot in the divider chain - also too risky if the pot wiper comes off the track.

the diode in the 4430 is still a bad idea, the 1kV diodes are going to go bang as soon as you approach 900Vout due to the unknown leakage in the Tx despite large snubbers ...
 

Yes, the POT is not good and was known to be problematic since the start. This is probably the most important topic yet, and you beat me to it! The idea was to provide an over-damped comp setup for it to operate on, such that the gain range would not be an issue. It was digging around in bode plots for the IC that gave me the idea. The sensitivity to the range disappears at lower Hz responses. This supply can voltage sag 50% between pulses, so long as it can provide 400VA and recover to the set voltage between. Given loads between 50 to 250hz and acceptable sag, is this a logical approach?

PS10.jpg
 

Got another idea. How about adding a parallel resistor to the POT. If fail open, then PS goes to midpoint. If fail short, PS goes to 1KV shutdown limit and powers off.
 

So using both LM393 comp inputs, the FB ctk is now monitored over a range. Should the POT or other FB passives fail, the LM393 will latch the PS off. Does this provide decent protection?

PS10.jpg
 

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