Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

PSRR Considerations for high speed applications

Status
Not open for further replies.

rmanalo

Advanced Member level 4
Joined
Feb 8, 2017
Messages
107
Helped
16
Reputation
32
Reaction score
16
Trophy points
18
Location
Philippines
Activity points
979
Hello everyone,

So far in my studies I have analyzed and designed voltage references through simulations. I've read articles where the PSRR of most reference circuits are tested from 10 Hz to 10 MHz only. This had me curious about the precision on relatively high speed switching circuits operating above 10 MHz.

Say for example a wireless sensor node operating at a clock frequency of 20 MHz and requires a stable reference voltage for precision measurements. The switching of these digital circuits would then manifest as transient spikes along the supply of the voltage reference affecting the measurement results. I guess what I'm asking is what do designers do when they use voltage references with specifications guaranteed for 10 MHz and use them for applications higher than that?
 

One reason I feel most of the circuits limit themselves to a 10MHz bandwidths is because that is easier. In order to get a good PSRR at higher frequencies one would need to burn either Power (use hogh bandwidth voltage references)or Components(to implement filters)

Some solutions that I have seen or that I can think off are

1. Add a filter at the reference output. This removes any noise but creates a high impedance node which could be troublesome for wakeup time etc. Also check if it affects the Voltage reference stability.
2. Add a filter at the supply to the Reference circuit. This can be done mostly for low power references where the total current is small enough that one can handle an IR drop across the filter resistor without affecting the working much.
 
Last edited:
Hi,

PSRR = power supply rejection ratio?

Power supply usually is DC with decoupling capacitors.
Let´s assume there is just a 1uF capacitor. At 10MHz it´s Xc is 16mOhms.
You need a 10MHz ripple current of 6A RMS to get a ripple voltage of 100mV RMS.

--> I assume there is no need for high frequency PSRR, because it´s not very likely that there is extremely high ripple current and the same time low value power supply capacitors.

Klaus
 

There are a few LDOs out there that specify HF PSRR but
many just spec DC and give you a rolloff "typical" curve.

At high frequency you can't count on the feedback loop
and have to give it the bypassing (& board design) it
needs, to get the power input quality (as-loaded) that
you need. High speed serial resources are very demanding.
Figure that your prop delay varies at least as much,
ratiometrically, as your supply voltage and that variation
eats into the open-eye space if you have ripple on the
"DC" supply. If your power supply dude decides to be a
"cost hero" and save a dollar on output filter components
and you're left holding the BER bag....
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top