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  1. #1
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    Is there a way to implement generic map iostandard with ultrascale ibufds?

    Hello all,

    I posted a similar question on xilinx forum, however I know this forum and community is much more informative and responsive.
    The goal it to create a configurable gpio pad ring for an fpga design. A package file contains the information for GPIO_TC_DIR and GPIO_TC_TYPE, which are the conditions used in a generate statement to determine which io buffer is instantiated.

    For full detail of the problem please see https://forums.xilinx.com/t5/Impleme...-1/td-p/965930

    Basically in a kintex 7 I can get away with the following code, but I can't on an ultrascale (language template - doesn't show iostandard).

    Code VHDL - [expand]
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    --vhdl08
    gpio_type : 
                    If diff_type : (GPIO_TC_TYPE(I) = Differential) Generate
                    begin
                        gpio_dir : 
                            case GPIO_TC_DIR(I) generate
                            when c1: input_only => 
                                begin
                                    gpio_tc_ibuf : IBUFDS                            
                                    generic map
                                    (
                                        iostandard => "BLVDS_25"
                                    )
                                    Port Map
                                    (
                                        O  => GPIO_T_IN(I),         
                                        I  => GPIO_T(I),           
                                        IB => GPIO_C(I)          
                                    );
                                    GPIO_C_IN(I) <= '0';                  
                                end c1;
                                --End Generate ip; elsif op : (GPIO_TC_DIR(I) = Output_Only) Generate
                           when c2 : output_only => 
                                begin
                                    gpio_tc_obuf: OBUFDS                  
                                    generic map
                                    (
                                        iostandard => "BLVDS_25"
                                    )
                                    Port Map
                                    (
                                        I  => GPIO_T_OUT_int(I),          
                                        O  => GPIO_T(I),                  
                                        OB => GPIO_C(I)                   
                                    );                                    
                                    GPIO_T_IN(I) <= '0';
                                    GPIO_C_IN(I) <= '0';
                                end c2;
                            end generate
                        gpio_dir;
                    end  diff_type; elsif se_type : (GPIO_TC_TYPE(I) = single_ended) generate
                        begin
                            gpio_t_iobuf : iobuf
                            generic map
                            (
                                iostandard => "LVCMOS25"
                            )
                            port map 
                            (
                                i  => gpio_t_out_int(i),
                                t  => gpio_t_op_enb(i),
                                o  => gpio_t_in(i),
                                io => gpio_t(i)
                            );
                            gpio_c_iobuf : iobuf
                            generic map
                            (
                                iostandard => "LVCMOS25"
                            )
                            port map 
                            (
                                i  => gpio_c_out_int(i),
                                t  => gpio_c_op_enb(i),
                                o  => gpio_c_in(i),
                                io => gpio_c(i)
                            );
                    end  se_type;
                end generate gpio_type;

    I'm at home now so I can't check whats available in the language template. Does anyone know of a better component I should use? (note configuring the xdc to have the values defeats the purpose of the generate & generics)

    Regards,
    Wes

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  2. #2
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    Re: Is there a way to implement generic map iostandard with ultrascale ibufds?

    Have you tried to do it with "attribute iostandard" instead of a generic?
    See the IOSTANDARD section of UG912 (v2018.3), page 251.



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  3. #3
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    Re: Is there a way to implement generic map iostandard with ultrascale ibufds?

    Having issues with the signal
    Code VHDL - [expand]
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    attribute iostandard of gpio_t(I) : signal is LVDS_25;
    Can't identify the signal.

    "attribute iostandard : string" seems happy being placed in block declarative part/item {xxx}
    Code VHDL - [expand]
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    generate
      --xxx
      attribute IOSTANDARD : string;
      attribute IOSTANDARD of GPIO_T(I) : signal is "LVDS_25";
      attribute IOSTANDARD of GPIO_C(I) : signal is "LVDS_25";
    begin



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  4. #4
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    Re: Is there a way to implement generic map iostandard with ultrascale ibufds?

    From the previous post, I don't understand if the problem is solved or not.
    In the first example, LVDS_25 has no quotes, so it isn't a string.



  5. #5
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    Re: Is there a way to implement generic map iostandard with ultrascale ibufds?

    I was not able to get attribute method working with a generate statement.

    I can get away with using a bespoke constraints .xdc file per design. However the plan was to use a purely hdl solution for xilinx, where the configuration & package variables determined the input output voltage standards for certain gpio pins.



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