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[SOLVED] Signal Ground attached to my DC bias ground?

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Hawaslsh

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Hi All,

Had a quick question. I am putting together a lock-in amplifier, on the cheap. I ran across this design and I am going to i give it a try. However, as i was doing the schematic and laying out the circuit it dawned on me: is it ok if I tie my signal ground to my DC ground as well?

thanks for the help,
SAmi

Capture.PNG
 

You just have to make sure that there are no currents from "DC Ground" (I presume you mean power ground) that will sneak into the signal ground path. If you connect both signal ground and power ground right at the power supply common, that will minimize this problem.
 

If you connect both signal ground and power ground right at the power supply common, that will minimize this problem.

Thanks for such a speedy response! That was basically my plan. I tied signal ground directly to the ground for the +5,+15,-15V supplies. Follow up question, (sorry if its the same question, still learning), would it also be OK if the power supply is floating and i dont force a DC ground into the system?

Capture.PNG
 

Now I think you mean earth ground, not DC ground. Think about what you have with any battery-powered system. Is there a “ground” there? No. There’s a COMMON.

Somebody once said to me ‘ground is where you plant tomatoes’.

Also, pay attention to your two grounds on your schematic. If you intend to export a net list to a Pcb package keep in mind that the net list will make no distinction between the two grounds; it’s going to combine them into a single net.
 

Sorry if I'm being a pain,

If you intend to export a net list to a Pcb package keep in mind that the net list will make no distinction between the two grounds; it’s going to combine them into a single net.

I thought this was the strategy you just recommend? GND in that schematic refers to the common of the DC supply, not necessary earth ground.

"If you connect both signal ground and power ground right at the power supply common, that will minimize this problem."
 

Hi,

In my eyes: you must connect signal_GND with power_GND.

They must not be floating with respect to each other. Otherwise the circuit will fail to operate ... in worst case a device may be killed.

I recommend to do this at a certain point on the PCB. ...just to avoid that any transient current in the wiring (wide loops, inductive) causes transient voltages beyond IC specification. At least use two anti parallel diodes on the PCB to avoid true floating.

Where the "certain point" is depends on the expectable currents.
In your case, I'd connect them at the power supply connector.
But on the PCB you still need to treat them seperately. Either by using two GND_planes on different layers, or with intelligent component placement and intelligent splits in one GND plane (the more difficult solution).

If you connect both symbols it is very likely that your PCB layout software treats it as one single signal without splitting them.

Klaus
 
Sorry if I'm being a pain,



I thought this was the strategy you just recommend? GND in that schematic refers to the common of the DC supply, not necessary earth ground.

"If you connect both signal ground and power ground right at the power supply common, that will minimize this problem."

Yes, I recommended tying the two grounds together. I did NOT recommend tying them together anywhere/everywhere, which is what could happen the way your schematic is drawn. As I said, you need to tie the grounds together at the regulator. The netlist from your schematic would just have a single net comprising BOTH of your grounds. If you were to give that netlist to a PCB layout person, they would have no way of distinguishing the two separate grounds unless you gave them very specific instructions.

One trick I often use is to create a dummy component (you could use a resistor, for example). Then I tie the two grounds to either end of the resistor. When I lay out the board, I place the "resistor" near the regulator and then just add copper to connect the two grounds together. This is not a perfect method, as it will cause DRC errors and you also end up with a component that's not really a component. I'm not aware of any PCB package that can gracefully handle this very common situation.
 
Final thought before I put this thread to pasture.

I did as you suggested, made sure the two nets (supply common and signal ground) were separate and provide a bridging point next to the 5V supply common. It would be nice to test the difference between tying the two on the board level and at the actual supplies. Do you think it would be detrimental to use a 0 Ohm jumper to make that connection and not a copper trace? Maybe i'm over thinking it...

Thanks for all the help!

Capture.PNG
 

zero ohm jumper would probably be fine. BUT, those are pretty wimpy looking ground traces. Is this a single-layer board? Is there a reason you haven't used ground plane?
 

Hi,

I agree with barry.
All your thoughts are almost useless when you don't have true ground planes.

Klaus

Klaus
 

Hello again,

Thanks for all the input. You both are helping more than you can imagine! I am still figuring out the layout software (circuitmaker) and didn't have my ground planes poured right. After a bit of a struggle and some google searching I've managed two large ground planes, a common DC and my signal ground. Also beefed up all my supply lines to 30 mils and signal lines to 15 mils.

Thanks again,
Sami

Capture.PNG
 

Hi,

Now we see "copper area" or"copper fill", but no true GND-plane
Whether this is suitable or not depends on the whole PCB and it's circuit and the current flow...it can't be verified with that snippet of the PCB.

To widen signal lines most probably brings no benefit.

Klaus
 

Hello,

Context is probably important, i was only focusing in because of the initial topic of this thread. But... if you are also willing to look at the whole design, here goes. The schematic is above, however, I added 2 muxes to toggle between gain resistors and output filter caps.

backside.PNG
(backside)
At what point would a copper fill transition to a true ground plane: a size issue or more complex? For reference, that board is 2.5x4 in. Most of the backside is signal ground. There were only 3 components which required a DC common connection, so I limited its copper to only encompass those vias. That DC common plane is 90mils wide at its smallest point.

frontside.PNG
(frontside)
"There were only 3 components which required a DC common connection, so I limited its copper to only encompass those vias." That being said. The front side needed to route +15, -15 to power the LNA, Chip doing the down converting (AD630), and output amp. The LNA data sheet (directly below) claims a super low bias current, but that seems unreasonable during operation. The power supply numbers make more sense? However, assuming 2.2mA LNA, 40mA AD631, 3mA output amp, those 30 mil lines should be ok?
The 5 volt supply, which will actually be 4.3V (still have to change the silk screen), is powering the 2 muxes. Their data sheets (further below) boast some pretty high switching currents and over all power consumption, 500mW @ 4.3V is ~117mA. :???: But a 30 mil line should cover it? A few on-line PCB line calcs claimed 30 mils would cover up to 2 amps with 1oz of copper.

ina114.PNG
mux.PNG

Thanks again for all the advice! Being pretty much 100% new to layout, i accept any and all critics.
Sami
 

Hi,

there is not a single power supply decoupling capacitor!
--> add a bulk capacitor per rail and a ceramics capacitor at each power supply pin of each IC.
... then there are some parts more connected to the DC common connection.

***
With your PCB layout I see yo think in signals from A to B. But this is only half of the truth. Each signal needs it´s return path.
You need to see a signal as a loop. This is true for power supply as well as digital or analog signals.

The loop should be low impedance, short in length and small in enclosed area.
Often the loop is not meant as a loop where you expect DC currents - the more important are the HF characteristics of these loops.

Example:
NX3L_GND pin --> NX3L_internal supply --> NX3L_VCC pin --> external (new) power supply decoupling capacitor --> GND --> back to NX3L_GND pin

***
Maybe you simulated this circuit without problems....
* but simple simulation doesn´t care about trace impedance... and it takes the power supply as "ideal"
* also it doesn´t care about VCC limitation. NX3L4051 is designed for 1.8V ... 4.3V supply voltage. But you connect (dirty) 5V to it. In the Absolute Maximum Ratings it says: VCC limit is 4.6V. --> any voltage a bit higher than 4.6V - even if in the microseconds - may harm the IC.

Also I see a lot of unconnected pins. General rule: Don´t leave any (unused) pin floating. No digital pin and no analog pin. (except NCs). I don´t know whether the unconnected pins are internally prevented from floating....Please check yourself.

And I see many pins leaving the PCB without EMI/EMC filters and without ESD protection.

Be sure the NX3L signal input voltage range is suitable for your application. Urgently check this.

***

5V supply.
Why do you use an external supply or just 12uA (max) of supply current? Any simple regulation from 15V (shunt, zener, integrated linear regulator) will improve signal qualtiy (less noise through external supply) and improves reliability.

Added:
500mW @ 4.3V is ~117mA
Makes no sense. Power supply current is specified to be max. 6uA per device.
The 500mW of power dissipation is across the signal path... which should be negligible in your case.

Klaus
 

there is not a single power supply decoupling capacitor! --> add a bulk capacitor per rail and a ceramics capacitor at each power supply pin of each IC. ... then there are some parts more connected to the DC common connection. Klaus

Does it matter than I intended on supplying the power though a pretty nice lab grade source? That's primary why i didn't care about the 5V designation, I planned on testing the switches at different bias levels. Regardless, whats a good rule of thumb, X uF across each device? This may be a silly question, but just double checking. For the amps which are supplied +15 and -15. The caps would go to the common reference: +15 to common, and not across +15 to -15?


Maybe you simulated this circuit without problems....
I wish. Its only been tested on a breadboard. It yielded fairly comparable results to a commercial grade lock-in amp, but the signal fidelity and reliability left A LOT to be desired. Since getting a two layer board is so cheap, figured, might as well give it a go and see.

Great point on the switches, they weren't on the original bread board. I dont recall seeing a output voltage larger than 4V, but i'll definitely make sure. In any case, we had to wait for SMD to dip converters in order to test them out. The best laid plans...

I'll also start addressing the unconnected pins. However, that does beg the question, to which ground many should be connected to. The simple example is the switch, the digital inputs/outputs i am not using go to DC common? However, the chip doing the down converting. Clearly which ground will depend on the pins function. Anything related to biasing is DC common while the rest Signal Gnd?
Capture.PNG

Thanks again!
Sami
 

Hi,

Even if your power supply is ideal, then the wiring causes stray inductance. This is what you need to take care of.

In my PCM designs: When the wiring/traces are longer than 1.5cm I put an extra capacitor.
--> I assume the wiring to your power supply is much longer than 1.5 cm.

whats a good rule of thumb, X uF across each device?
100nF X7R

This may be a silly question, but just double checking. For the amps which are supplied +15 and -15. The caps would go to the common reference: +15 to common, and not across +15 to -15?
GND is your reference for the power supplies, thus this is also the reference for your power supply capacitors.

Generally - if not otherwise noted: all voltages are referenced to GND.
***

If you ask me:
I´d get rid of the 5V input and the second GND.
--> use a R, a zener and a tantal bulk capacitor to generate the supply for the NX3L..

***
GND in the Functional block diagram:
The answer is simple: I see only the triangled GND symbol is related to AD630 .. thus the AD630 can only referece to this node. It doesn´t know about the other GND node.
--> If you use GND then use the "triangled" GND

***
If you want to go for low noise: My recommendation: use lower value resistors around the OP07. (maybe 1/10 of it). And add (the pads for) a low pass filtering capacitor across R3.

***
I just saw that you have a +15V/-15V supply input. To work properly it needs a GND connection, too.

Klaus
 

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