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  1. #21
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    Re: Opamp circuit simulation

    Quote Originally Posted by promach View Post
    See https://github.com/promach/opamp

    Could you propose a suitable testing circuit configuration for settling time ?
    For example, place the amplifier in a unity gain non-inverting configuration - worst for stability.

    Do a small signal input step, maybe 20 to 50mV around your input DC value in both positive and negative direction. Let the step rise/fall in less than 1ns.

    After that you can do large signal step to check besides other things also slewing. Say, 500mV of step amplitude.



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  2. #22
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    Re: Opamp circuit simulation

    Ouch, I forgot to include the output load capacitance and resistance.

    The circuit on the github is incomplete.

    So, the unity-gain bandwidth is only 64.76MHz.

    Last edited by promach; 20th April 2019 at 10:11.



  3. #23
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    Re: Opamp circuit simulation

    Although the following phase plot has VERY VERY GOOD phase margin, but I still suspect something is VERY WRONG.

    Any advice ?



    - - - Updated - - -

    For example, place the amplifier in a unity gain non-inverting configuration - worst for stability.
    @sutapanaki

    Could you advise why the following transient simulation waveform is wrong ?

    Removing the output load OR using 50mV pulse also does not give a pulse in the output node.




  4. #24
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    Re: Opamp circuit simulation

    I see that in the last schematic you have connected the gate of the output PMOS M14 not to the output of the 1st stage but to the drain of M13



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  5. #25
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    Re: Opamp circuit simulation

    I see that in the last schematic you have connected the gate of the output PMOS M14 not to the output of the 1st stage but to the drain of M13
    Yup, and I am doing some experiments.

    But it seems not working at least for the unity-gain non-inverting buffer configuration



  6. #26
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    Re: Opamp circuit simulation

    Well, if M14 is connected like this, it is not supposed to work properly. You see, you don't have virtual short at the input of the amplifier.


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  7. #27
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    Re: Opamp circuit simulation

    don't have virtual short at the input of the amplifier.
    In this case, how is gate of M14 related to virtual short for in- node ?



  8. #28
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    Re: Opamp circuit simulation

    From the material that you posted initially in the beginning of this discussion, M14 is the feed-forward device. But for simplicity just consider M14 and M16 as something similar to an inverter. The gates of these two transistors have to move in the same direction to create good negative feedback for the amplifier. If gate of M16 goes down because M11 sinks more current than M15 can source, then the gate of M14 should also go down, because if M16 is turning slightly off, M14 should turn slightly on, so the output can stay more or less unchanged (or follow the input) - sort of a push-pull. If you connect the gate of M14 as in the last schematic, the two gates go in the opposite directions - if M16 tends to turn off, M14 also tends to turn off. You can imagine in the extreme if both turn off hard, the output will be kind of high impedance and can have any value - so, it will not follow the input and will not create virtual short. That's why the gate of M14 has to be connected to the output of the first stage because between the output of 1st stage and gate of M16 you have two inversions.


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  9. #29
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    Re: Opamp circuit simulation

    Firstly, I don't understand why the arbitrary design change (M14 gate connection) from post #22 to post #23 was made? Any problem of the old circuit that should be handled? What did you want to achieve?



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