PLL Lock range and capture range

Why is the lock range of a PLL larger than the capture range?

In the case of a 4046, this statement is only true if you are using PC2.

If you think about how a PLL works then the answer should be fairly clear.
When a PLL is already in lock, then it can track (within limits such as the range of the VCO) any changes to the input frequency because each change is (relatively) small. There is always a fairly small change in the phase of the input frequency and that of the divided output frequency.
However when the PLL is not in lock,there is no phase relationship between the input and divided output frequencies. Therefore the difference signal to the VCO can vary wildly and with each transition of the input or divided output frequency. If the signals going into the phase comparator are reasonably close, then the phase between then will drift a bit but fairly (relatively) slowly so that the VCO has a chance to adjust to bring the divided output frequency into phase with the input frequency.
Therefore the lock range can be a lot larger than the capture range.
Susan