# Design to state position of first one from lsb every clock for parallel data coming

1. ## Design to state position of first one from lsb every clock for parallel data coming

Can you please provide a design whose output will state the location of the first '1' from the LSB for an incoming parallel bit stream every clock?

2. ## Re: Design to state position of first one from lsb every clock for parallel data comi

Is this a homework?

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3. ## Re: Design to state position of first one from lsb every clock for parallel data comi

Originally Posted by ThisIsNotSam
Is this a homework?

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4. ## Re: Design to state position of first one from lsb every clock for parallel data comi

Originally Posted by fragnen
You seem to have a misconception of what this forum is about. Members will help you with answering questions you may have on a variety of electronics related topics. They will assist you in resolving problems you may have in code or concepts. What members are unlikely to help with is: Doing your work for you.

You have an assignment or a need to have this circuit then do one or more of the following:
a) design it yourself
b) hire someone to design it, if you are not capable of designing such a circuit
c) try to design it and ask questions on the forum (showing what you have done) about any problems with your circuit that you can't figure out how to fix.
d) search the internet for your answer

Of the various options you will learn the most by doing either a or c.

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5. ## Re: Design to state position of first one from lsb every clock for parallel data comi

Originally Posted by fragnen
Can you please provide a design whose output will state the location of the first '1' from the LSB for an incoming parallel bit stream every clock?
What you want is identical to a "priority encoder."

6. ## Re: Design to state position of first one from lsb every clock for parallel data comi

There are 2-3 ways to code this. The obvious is a for loop from msb to lsb. This actually works when the synthesis tool understands and implements this in a good way. The fancy way uses "bitscan" with (x) & (-x). This expression returns a one-hot vector with the lowest 1 being the only bit set. The third method is manually generating the logic for a priority encoder.

There is also a priority encoder implementation that takes a 1-hot vector and does the and-or map-reduce with 10101010, 11001100, 11110000, etc...

7. ## Re: Design to state position of first one from lsb every clock for parallel data comi

Originally Posted by vGoodtimes
There are 2-3 ways to code this. The obvious is a for loop from msb to lsb. This actually works when the synthesis tool understands and implements this in a good way. The fancy way uses "bitscan" with (x) & (-x). This expression returns a one-hot vector with the lowest 1 being the only bit set. The third method is manually generating the logic for a priority encoder.

There is also a priority encoder implementation that takes a 1-hot vector and does the and-or map-reduce with 10101010, 11001100, 11110000, etc...
Will the rtl with for loop be synthesizable ? But for loop reduces the work. If it is a priority encoder it is a big code when the width of the input data is parametrized.

What is the bitscan mathod. What is x and what is -x?

Thank you.

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8. ## Re: Design to state position of first one from lsb every clock for parallel data comi

What is x and what is -x?
Review this previous thread for an explanation. https://www.edaboard.com/showthread....d_logic_vector

In my view, a behavioral description of the intended logic, typically using a for loop is a straightforward approach to synthesize it, as long as you don't have additional requirements, e.g. implementing pipelining or enforcing a specific hardware implementation like using carry chains to speed up the design.

Some synthesis tools have difficulties to implement non-arithmetic problems like priority encoder optimally following a behavioral description, but they are always able to implement it correctly.

9. ## Re: Design to state position of first one from lsb every clock for parallel data comi

Code:
```for (i=0; i<WIDTH, i=i+1) begin
if (input[i]) begin
position = i;
break;
end
end```

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