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Single SPI SS to control multiple devices

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tahirsengine

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I am given a task to design a SPI master module in Verilog (The ultimate goal is to design an sensor ASIC).

The problem is: I have only four I/Os i.e. MISO, MOSI, SCLK, and SS(single line).
But on the slave side, I need to control four slaves i.e. EEPROM, an ADC and two digital processing block(can reduce to one).

The question is: How may I control these blocks as slaves using just one SS line. Is there any standard methodology for doing this in ASIC arena?
 

Hi,

I see no standard solution for this.

Some SPI slaves are made for daisy chaining, but otherwise they need independent enable signals.

Or use I2C instead, they don´t need independent enable signals. Just two signals: SDA and SCL.

If you have programmable logic, then you may do a tricky solution, where the first transmitted byte is some kind of address byte...
and after the first byte is transmitted the PLD decides which SPI slave becomes active - according the contents of the first byte.


Klaus
 
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