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MOSFET diode connected for biasing

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Junus2012

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Dear Friends,

for your kindness, I attached you an image showing two possible ways to connect MOSFET as a diode to provide biasing voltage, I usually use the circuit (1) and I know the principle of it, but some people are using the setup in circuit (2) and I don't know what is the advantages over circuit (1) or how it is working.

biasing.jpg

Thank you in advance for your help
 

In my opinion set up (2) is more precise. You'll notice that in set up (1) you set the biasing by increments of Vgs for each transistor stacked. While in set up (2) the two transistors can be seen as a single transistor with twice the length [note that M22 is in triode] giving a more precise adjustment. Moreover, biasing is simply mirroring currents, and thus matching is an important aspect in precision design. Take a look at the attached image from razavi's book.

Capture11.JPG
 
The first circuit will give you a bias voltage of Vdd- 2*Vsg. In a modern sub-micron process, that may be too low a voltage.
In the second circuit, the bias voltage will be Vdd- Vsg which will be higher than case (i).

The second circuit is often used for biasing low voltage cascode transistors. You should refer to the chapter on current mirrors of Grey and Meyer (Pg: ~ 270 of Fourth Edition; Analysis and Design of Analog Integrated Circuits)
 
Dear friends,

Thank you for the reply,

Exactly you are right concerning the amount of the output voltage. In circuit 1 Vbias = Vdd- 2*Vsg, and in the circuit 2 Vbias = Vdd- Vsg. By this way we can not directly compare in between the two circuits as each of them provide different voltage.

However, one possible comparison can be done according to your explanation for the circuits below, What are the difference in between please, ideally they must all provide the same Vbias, and the circuit C has the lease area

bias2.jpg

- - - Updated - - -

I would like to ass this scheme to the comparison

bias3.jpg
 

Hi,

I dimly remember one has better power supply rejection, maybe it was the CASCODE connection. Quick simulation of both with varying VSS and an obligatory temperature sweep transient should reveal interesting answers. The recommended reading material in post 3 (and rather a lot of op amp design publications) explain it all far better than I could without re-reading it all myself.
 
Its all really the same except for the body effect which changes the threshold voltage of the transistors and you will see different output voltages for the different configurations.
As d123 commented, its also worthwhile to check the PSRR. They will have different PSRR for sure.
 
Thank you guys for your reply, I will connect them then I see which one provide more stable voltage
 

Dear friends,

I have simulated all the possible configuration

I am getting almost the same current even after performing the Montecarlo simulation, Worst case corners and under wide temperature range from -55 to 155.

Until now this simulation prove that the simpler one in circuit C can provide same biasing voltage with less design complexity and area.

I am testing the biasing voltage for biasing wide swing current mirror and monitoring the current.

The only remaining thing from your suggestion is to simulate the PSRR. your arguments was that the cascoded transistor should give better PSRR. However, an important fact is that those are not cascoded transistors, because only the down dioide connected transistor is in saturation and other works in series. So they are Series transistors not cascoded.

By any way I would like to follow your suggestion to simulate the PSRR, but I don't know the setup. I usually do the PSRR for the opamp by connecting it as a unity gain buffer and put an AC source in series with the supply voltage then I run the AC simulation to find the transfer function from the output to the AC source.

Basically this should also work with the biasing voltage by running the AC simulation to find the transfer function from Vbias to the AC sourcem but I am getting Zero. Could you please correct me my setup ?

Attached you see please the circuit setup

PSRR.png

Thank you in advance
 

I think its because you have biased with an ideal current source. Connect a realistic output impedance and check the PSRR.
 

I think its because you have biased with an ideal current source. Connect a realistic output impedance and check the PSRR.

Dear Vive

can you please correct me my PSRR setup ?
 

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