[PIC] Interrupt based pulse counting for PIC 32

Code C++ - [expand]
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#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <plib.h>
#include <string.h>
#define BAUDRATE 115200
#define GetSystemClock()            (80000000ul)
#define GetPeripheralClock()        (GetSystemClock()/(1 << OSCCONbits.PBDIV))
#define GetInstructionClock()       (GetSystemClock())
 
int count=0;
/*
 * 
 */
 
void __ISR(_EXTERNAL_0_VECTOR, IPL2SOFT) Ext0ISR(void) { // step 1: the ISR
    count = count + 1;
 
IFS0CLR = 1 << 3;
}
int main(int argc, char** argv) {
    //int count;
    char ct[10];
    UARTConfigure(UART2, UART_ENABLE_PINS_TX_RX_ONLY);
    UARTSetFifoMode(UART2, UART_INTERRUPT_ON_TX_NOT_FULL | UART_INTERRUPT_ON_RX_NOT_EMPTY);
    UARTSetLineControl(UART2, UART_DATA_SIZE_8_BITS | UART_PARITY_NONE | UART_STOP_BITS_1);
    UARTSetDataRate(UART2, GetPeripheralClock(), 115200);
    UARTEnable(UART2, UART_ENABLE_FLAGS(UART_PERIPHERAL | UART_RX | UART_TX));
    
    INTDisableInterrupts(); // step 2: disable interrupts at the CPU
INTCONCLR = 0x1; // step 3: INT0 triggers on falling edge
IPC0CLR = 0x1F << 24; // step 4: clear the 5 pri and subpri bits
IPC0 |= 9 << 24; // step 4: set priority to 2, subpriority to 1
IFS0bits.INT0IF = 0; // step 5: clear the int flag, or IFS0CLR=1<<3
IEC0SET = 1 << 3; // step 6: enable INT0 by setting IEC0<3>
INTEnableSystemMultiVectoredInt(); 
 
while(1)
{
    itoa(count,ct,10);
    putsUART2("count is:");
    putsUART2(ct);
    putsUART2("\n");
}
    return (EXIT_SUCCESS);
}