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    VLSI physical design (cadence library)

    i got a warning message at synthesis stage saying "Library cell has no output pins defined. [LBR-9]
    : Library cell 'BOUNDARY_LEFTBWP40P140' must have an output pin." and some other cells with same warning. these cells are physical cells defined in library.can i ignore this warning or do i need to fix it? if yes how to fix it what is the command? i'm using cadence genus for synthesis

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  2. #2
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    Re: VLSI physical design (cadence library)

    Quote Originally Posted by Crazyshan View Post
    i got a warning message at synthesis stage saying "Library cell has no output pins defined. [LBR-9]
    : Library cell 'BOUNDARY_LEFTBWP40P140' must have an output pin." and some other cells with same warning. these cells are physical cells defined in library.can i ignore this warning or do i need to fix it? if yes how to fix it what is the command? i'm using cadence genus for synthesis
    safe to ignore
    Really, I am not Sam.



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