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fully digital pwm amplifier

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el00

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Hello I need to drive 48Vrms into a few ohm speaker with a very short duty cycle (less than 10%) therefore with a low average power. In this application I am transmitting pre-recorded wav files. Frequency more or less is audio band.
I am interested in directly driving power mosfets from an FPGA, doing a similar thing to the class D amplifier, but without the need to convert WAV->DAC->classD. In fact, in this way, there is a double conversion to analog and then to digital because the class D de facto is a digital system.
I could not find any literature or documentation on this. The only thing that I found are those 2 commercial chips, which do not fit my requirements due to the low power and voltage rails:
TAS3251: this is, however, not exactly what I am talking about, since it contains a DSP and DAC's, converting the signal to analog an back to digital. Why this waste of resources? Why not drive the final stage directly?
BM28723MUV: this is exactly what I want to do. However, it would have been nice if the FET's were external, so that I can use whatever power device I want to increase the power.

Other than that, I could not find anything else.
I can develop it, but I have very little experience with class D. Is there any reading that you suggest?
 

This is pretty straightforward at least at a high level.

First make a modulator in the FPGA that converts the digital sample to a variable duty cycle at your chosen frequency (we can come back to this if you need)
Second, find a "half bridge gate driver" IC - there are tons of these

The FPGA needs to simply drive the duty cycle output to the half bridge gate drivers. You may chose to have a single AC coupled half bridge or a full bridge but either way the hardware is similar. FPGA->Gate Driver->Fets

There are also ClassD audio amplifier IC's that take in a duty cycle input directly and integrate the gate driving and the fets.
 

Hi,

Did you see TAS5634?
I think it comes close to your requirements.

Klaus
 

The numeric values in digitized audio (such as wav format) are amplitude readings. If you plot the numbers, the waveforms resemble what you'd see if you were to feed the audio to an oscilloscope. (This is obvious if you open a wav file in a sound processing program.)
To translate those amplitude numbers into PWM, you take the sine of the amplitude. That's the quick explanation.

A 555 timer IC can be a class D amplifier. As a pulse generator it produces PWM automatically if you feed the audio to the Ctl pin #5. Set up the 555 as a pulse generator. You need to level shift the AC signal into the DC region. Since you want short duty cycle the applied voltage should be a fraction of the power supply.

The 555 outputs pulses which alternate between ground and supply V. (Notice it is not the same as DAC.) Send it through a low pass filter (typically LC second order). The result is audio waveforms ready to power a speaker.

The simulation below is a concept. To build a workable circuit, add a half-bridge and adjust component values. The 555 IC cannot tolerate 48V although with a 12V supply it provides sufficient bias to transistors or mosfets.

555 IC class D amplifier 48v supply 300Hz sine PWM LC low pass 8ohm load.png
 

Hi,

Did you see TAS5634?
I think it comes close to your requirements.

Klaus

I did not know that part, it is very interesting. I think it will come useful for sure, however for this application the voltage requirement is higher, because I need to inject 48Vrms into the load.

However, reading the datasheet what impressed me is that if you look at the THD versus power you see that it dramatically increases over 200W, which means that probably developing a high power device like that is not so easy.
In fact, doing it with a FPGA is in principle not so difficult, but doing a low THD amplifier is another story.

In reply also to BradtheRad, what you described is actually used in some class D amplifier.
However, I forgot to mention that the most important reason why I would like to develop it as a full-digital device is that for most of the time the device is silent. The most critical part is the recovery from the mute, which usually is not taken in consideration in commercial class D amplifiers as they are designed in order to output sound all the time, and not being switched on and off continuously. Using a FPGA would allow setting the output in high-Z when not transmitting. Of course there is the problem to do it pop-free.
The TAS5634 is quite slow in the recovery, too. Does this depend on charge pumps? Maybe this can be overcome with dc converters to power high side switches?
 

Hi,

what impressed me is that if you look at the THD versus power you see that it dramatically increases over 200W
No, it´s simply the result of clipping.

Some interesting links. Take some time, read the datasheets as well as the application notes and design notes.
https://www.infineon.com/cms/de/product/power/audio-driver-ics/class-d-audio-ics/#!products
https://www.infineon.com/dgdl/Infin...N.pdf?fileId=5546d462677d0f460167bba4f4e81abd
https://www.infineon.com/cms/de/product/power/audio-driver-ics/
https://www.microsemi.com/document-...-class-d-stereo-audio-amplifier-controller-ic

Klaus
 

Hi,


No, it´s simply the result of clipping.
Klaus

Oops, I was not seeing the obvious.
You are right, in fact to inject 600W into 3R (in parallel mode) 42Vrms are needed, which means that Vpk = 60V which is over the rail, that is why in the PBTL graph the THD starts going up between 200 and 300W.
And this is the reason why I need higher rail voltage (about 150-160V is needed).



Lot of interesting documentation. I will take my time to read it. Thank you very much.

Still wondering why what I am proposing (directly driving the mosfets from digital circuits) is not commonly used. There must be a reason that I don't catch now. It seems strange to me, since 90% of the sound that is played back in the electronics comes from digitized audio.
 

Hi,

Still wondering why what I am proposing (directly driving the mosfets from digital circuits) is not commonly used.
Why do you think it is not commonly used?

Many, many applications drive discrete halfbridges from digital circuits..

Or are you talking about audio Class D amplifiers in specific?
--> Then they simply optimize the circuit. Digital filtering, spread spectrum, dead times, feedback, SOA, overcurrent, avoiding DC ... and a lot more.
If you do this all as discrete circuitry, then you (the schematic an PCB designer) have to care about all this. ... and it makes it impossible to guarantee THD, efficiency, EMV, EMC .... Every PCB design will be different in behaviour.

If you go through some threads here with "halfbrige circuits" you will recognize that the PCB layout is critical and has great influence in overall performance.

Klaus
 

Hi,


Why do you think it is not commonly used?

Many, many applications drive discrete halfbridges from digital circuits..

Or are you talking about audio Class D amplifiers in specific?

Klaus

I am talking about audio amplifiers only.
I think you should agree that it is not very common to drive the mosfets directly from a digital device.
 

Hi,

I think you should agree ..
I already agreed for audio amplifiers and additionally explained why...

Klaus
 

I am talking about audio amplifiers only.
I think you should agree that it is not very common to drive the mosfets directly from a digital device.

I can't see how this is true.

With all the millions of small and cheap digitally based audio today it's cheaper and easier to stay digital rather than convert from digital to analog and then feed an analog modulator.


In DC-DC converters analog modulators probably still dominate but digital control isn't uncommon at all.
 

To translate those amplitude numbers into PWM, you take the sine of the amplitude.

Sorry, I stated wrong. Instead...
Given an amplitude value, divide by your desired maximum. The result is a proportion which gives you the relative length of the pulse.

Example:
Carrier frequency 41000 Hz
Carrier period = 1/41000 = 24.39 uSec
16 bits of data=65536 possible values (range of values 0 to 65535)

Divide each datum by 65536 to obtain proportion of pulse length.

Since your supply is 48V, and you want PWM to output a few volts amplitude (say 6v peak-to-peak), then all data is further multiplied by 6/48=.125.

Therefore:
For incoming datum =1, pulse lasts 1 *.125 * 24.39 / 65536 uSec.

For incoming datum =65535, pulse lasts 65535 *.125 * 24.39 /65536 uSec. This is a 48v pulse for 1/8 of the carrier period. If you send them at 41000 Hz, and lo-pass filter, you get smooth 6V output.

A lookup table seems like a speedy method to generate PWM pulses.
 

However, I forgot to mention that the most important reason why I would like to develop it as a full-digital device is that for most of the time the device is silent. The most critical part is the recovery from the mute, which usually is not taken in consideration in commercial class D amplifiers as they are designed in order to output sound all the time, and not being switched on and off continuously. Using a FPGA would allow setting the output in high-Z when not transmitting. Of course there is the problem to do it pop-free.
The TAS5634 is quite slow in the recovery, too. Does this depend on charge pumps? Maybe this can be overcome with dc converters to power high side switches?
If you have novel requirements like this then you should probably provide more detail. Like what sort of pulse shape you want to create (you first mentioned 48Vrms, and then 150-160V....), required bandwidth, the load characteristics, how much ripple/distortion you can tolerate, etc. Off the shelf amplifiers designed for audio applications might not work for you (also note many of them are inherently AC coupled, which might also be a problem).
 

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