Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Problem generating polygon pour in Altium 17.1

Status
Not open for further replies.

limxx518

Newbie level 3
Joined
Mar 9, 2019
Messages
3
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
46
Hey guys!

I'm new to this forum and Altium as well.

I'm laying out a double sided PCB that must remain that way due to cost.

I have finished laying out the traces for all the signals, except for a power signal and ground. I found it near impossible for me the route the two signals to all the required pads without having the top and bottom traces criss-cross each other. These signals are all over the board on both layers. It may be due to poor part placement, but I thought a workaround to this problem would be to have two polygon pours on both layers, one for each signal. This would solve the problem, since the polygon pour would also connect the signals on both layers through some vias and through hole pads that I have on the board.

However, I keep getting the error Modified Polygon: Polygon Not Repour after Edit on Top Layer. I want to have the top layer pour be connected to ground, and the bottom layer connected to the power signal. Initially, I thought the reason I couldn't place the pour was due to overcrowded traces, since the PolygonConnectStyle is set to Relief Connect. So, I thought changing the connect style to Direct Connect would solve the problem. It didn't, and now I'm stuck.

What do you think is the problem? Is it poor part placement and routing. Is there any hope to solve it with my current placements? Attached is the picture of the board after trying to lay out the pour. As you can see, the whole board is highlighted in green that shows the error.

Altium_Polygon_Prob.jpg
 

I have managed to route the power signal to all the required pads, so now I can place ground pours on both layers instead. Does this make it any easier? I still can't generate the pour though
 

Did you assign the net when doing the pour ? Attach project file if you can.
 

I've managed to manually route all the traces for both power and ground. I still can't place the polygon pour though. I'll like to have a ground pour on both layers of the PCB. And yes, I did assign the net when doing the pour.

I can't attach the file, so I'm giving a link to the .PcbDoc file instead. I hope it's the correct file.

**broken link removed**

Thanks!
 

Attachments

  • PCB_board.zip
    595.2 KB · Views: 97

Your board is full of errors, in particular:
-board outline constraint
-silk to pad constraint e.g. U6,U7,U8 which have silkscreen over the pad. That is not good practice.
-clearance constraint
-min soldermask
-silk to silk
- and so on..

Once you get rid of all those errors (i.e. placement errors), and you are left with "no connection" or "antenna" erros, you are good to route. Polygon pour will be poured when you fulfill what I said.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top