Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Self Biased vs. Diode connected MOS

Status
Not open for further replies.

daniel442

Junior Member level 2
Joined
Dec 29, 2017
Messages
20
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
199
HI,
I would like to know what's the difference between the two circuits act as a Bias circuit ? one is "self-biased" and the other is diode connected device.
as you can see from simulation, they both Bias the transistor at the same operating point and both has same model parameters (gds,ron...)
so is there a different ? bias_question.png
 

What do you mean with "self-biased" in this regard? Both circuits are diode connected. Adding a gate resistor makes no difference bias-wise. AC behavior may be different, but it's not addressed in your question.
 

Self biased is the term (Razavi also called it that way) and it comes because the transistor biased itself with “no help” from outside source...
Can you elaborate please regarding the AC behavior ? Does the small/large signal behavior will change? Rout?
 

You didn't draw the amplifier which you want to bias. The amplifier's AC behaviour can be different with different biasing methods, not the bias circuit's AC response is relevant.
Please draw your amplifier with different bias circuits/methods and then we can help to explain what will be the difference. Above figure is nothing itself, just really didode connected devices.
 

You didn't draw the amplifier which you want to bias. The amplifier's AC behaviour can be different with different biasing methods, not the bias circuit's AC response is relevant.
You are correct. attaching my CS amplifier with - 1. self-biased, 2. diode connected + AC simulation for Vout/Vin :
bias_amp_q.png
 

I don't think the resistor in the diode path has anything to do with biasing (which can also be seen in your simulations). It has to do with other factors.

Connecting a supply net directly to the gate means that if there is a large spike on the supply, then the gate will see that large spike and can cause the oxide to breakdown. Putting that resistor there means you have a low pass filter from your supply to the gate and any spike on your supply voltage will be low pass filtered by the resistor right there.

Also, directly connecting the gate to the supply means you are connecting a capacitance to the supply net. This in combination with the bondpad inductance is a perfect oscillator. By placing that resistor in series with your gate, you create a poor quality capacitor which makes sure you kill any oscillations. People do use large decoupling capacitors on chip but that is well controlled as the supply networks are simulated separately to rule out any supply oscillations. But doing such a simulation with your full chip and all analog blocks in it is extremely time consuming. To rule out any inadvertent effects, designers often place such resistors in the feedback path.
 

Bias is not only important for the load of the CS amplifier. In your figures only the diode load is connected through a wire or a resistor. Non of them is self-biasing, because the main amplifier device is biased by an external DC source.

I want to show you something which should make it more clear:
nUKUPe1m.jpg


On fig.a the diode connected M3 is generating a Vgs for the amlifier device, M1. R is used to ensure higher AC input impedance (Zin) and DC coupling of the bias voltage to M1 from M3. M2 load is also diode connected for proper load bias.

On fig.b the M1 is diode connected through R, it is called self-bias, because the main amlifier transistor, M1 generates its own Vgs, M3 is not necessary. R has the same function, to ensure the DC coupling from M1 drain to M1 gate, and to increase Zin.

Main difference between the 2 methods that Zin of fig.a is ~R, Zin of fig.b is ~R/Au.
 
  • Like
Reactions: FvM

    FvM

    Points: 2
    Helpful Answer Positive Rating
Thank you, that really clear the subject.
 

One other aspect you may consider. Your amplifier load in both cases - diode connected load and the one you call self-biased is 1/gm which results in gain of about 0.5. However, at high frequencies, the "self-biased" version also has a zero formed by the Vgs and resistor in the gate of the load transistor. Sometimes this topology is used to give a little boost to the frequency response.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top