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Control Loop Compensation on Synchronous Buck DC-DC?

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berger.h

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Hello,
I have Synchronous Buck DC-DC converter from TI.
Controller works on 220kHz with full ceramic output C and error amplifier is in controller IC any as
FBZ.png

Amplifier is in IC and compensation network is external.
For my design is loop calculated thus

Loop.png

I want to add regulation CC, I thing i add external error amplifier which will be compared output current with reference .
what I solve and I do not quite understand them CC control Loop Compensation.
What should I do?
C rossover frequency 30kHz or maximum slope or about what?
 

Hi,

You do not need an external or additional error amplifier. Your compensation circuit is actually complete. The signal "Vramp" that you have is supposed to be your sense voltage (Isense*Rsense).

Your (Isense_pk*Rsense) is supposed to be equal to the Vsense value given in your IC datasheet.

Basically, current limiting is not needed at steady state operation but at load changes where you have significant transient response that comes with significant current changes with a possibility of saturation and damage to swicthes. The essence is to prevent that.The Vsense value given in your datasheet is the reference.
 
Last edited:

Well chose whether this current loop is going inside, outside or in parallel with the voltage loop. That informs some of the choices.

Though regardless it's hard to design a well performing current loop in a voltage mode topology because loop gain goes through the roof if there is a short circuit - presumably a case you may encounter.


A very realistic option is to use a current mode controller instead and then you get a high performance current loop for free. Choose a chip that exposes the current mode control input and you can limit that pin to whatever current you want.

A final issue is that when in current limit the voltage loop will saturate and it may be ugly when it comes out of saturation without some anti-windup scheme.
 

Thank you for the reaction.
I'll make it a little bit clear.
I need power supply with CV and / or CC mode and adjustable.
For CV mode I use Ti recomended design . Output voltage is adjusted by injection voltage (DAC) in center of the resistor divider.
Nothing complicated and it works reliably according to assumptions with value of CR compensation networks calculated in TI design tool (see pic Loop.png
Now I am dealing CC mode.
My ideal, on high side shunt resistor and high side current monitor amplifer any as INI 138
Voltage from this is compared on error amplifer with reference voltaga (DAC for set output current)., If output current exceeds set current error amplifier over diode inject voltage in center of the resistor divider (in CV loop) and blocking PWM as well as when the voltage is exceeded.
theoretically it will work. the question is the feedback loop parameters in the CC mod
 

Hi,

I always find CC feedback more difficult than CV feedback.

The problem is that the loop gain mainly depends on the load.
* There may be a low ohmic load resistor, where a small change in voltage causes big change in current.
* There may be a high ohmic load resistor, where a change in voltage causes only a small change in current.
* There may be an inductive load, where an immediate change in voltage causes only a slow change in current.
* There may be an capacitive load, where an change in voltage causes only a fast change in current.
... and everything inbetween.

Thus I can just give you this information but sadly no solution.

Klaus
 

Klaus is reiterating the point I tried to make as well. When you have a voltage source and you try to regulate its current into an unknown load you have a big problem: loop gain can be anywhere from 0 to inifinity.

User connects a 1 ohm load -> 1V gives 1A
User connects a 0.001ohm load -> 1V gives 1000A

I assume you can understand the implication of this for loop compensation -> it's theoretically impossible actually. Realistically you have a couple options:

1) Figure out the actual impedance of your system and make a loop that's stable in this condition -> This guarantees poor or mediocre performance into different loads but maybe that's fine
2) Add a linear current limit stage on the output
3) The best option which I mentioned earlier: switch to a current mode controller (google 'current mode control', 'peak current mode control', 'average current mode control')

3 has a ton of benefits. First CMC is extremely common in a huge range of controllers from all manufactures. Second it has its own benefits even for voltage regulation (TypeII rather than TypeIII compensation). Third it can completely solves your problem: off-the-shelf current mode controllers already have current and voltage loops built into them.
 

Hi,

Schematic of post #1 depicts a CPM modulator already.

I think it is obvious now that peak current mode control is your best bet. I explained your schematic in post #2.

The inner current loop that you want to design can be easily replaced by a simple comparator is provide in CPM control IC's, leaving the same outer voltage control loop.

UC*84* are one of the low cost CPM modulators that are available everywhere.

ADD:

You talk about some DAC voltage and some shunt resistor. That's not really gotten. Maybe you should show your circuit.
 

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