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    How to make a better design for this SMPS post regulator filter circuit?

    For minimizing SMPS ripple and especially noise, Iím trying to make a small interface which is a post regulator cascaded after an LC filter. I have come across some papers related to this topic and the idea is to establish good noise rejection by using a low drop out LDO regulator for frequencies lower than like 100 kHz and for higher frequencies by using an LC filter. At this video it also gives a very nice example at around 2:56.

    The topology can be seen in the circuit I have drawn in LTspice. Here is my circuit in question(the one inside the dashed box is the filter):

    Click image for larger version. 

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    The circuit is set for 120mA load with 12V regulator output to a 15V input.

    Now my biggest problem in simulation was that since I don't know the DC output resistance R3 of an SMPS and it can be different for any different SMPS. So for the worst case I took it as 0.02 Ohm. I say worst case because for the LC filter this doesnít prevent the resonance problem. So to prevent the LC resonance, I added a parallel 1 Ohm resistor R1 with the inductor L1. In simulation L1 and C2 forms a very nice high freq. filter. Then I use this LT1086 as an LDO. Here is its datasheet and in applications it is mentioned that it is also recommended for SMPS switching noise filtering(it says "Post Regulators for Switching Supplies"). R2 and Rp set the output to around 12V for a 15V input. Rp can be a potentiometer to fine-tune the output voltage. According to the datasheet if Iím not mistaken the C1 is needed to be a tantalum capacitor and C3 is a ceramic capacitor both with low ESR.

    Now I have made transient analysis in LTspice for this filter where the input is 15VDC with 1V pulse noise (with 10p rising falling edges) superimposed on it. So I repeated the same procedure for different noise pulse frequencies 50Hz, 100Hz, 1kHz, 100kHz, 1MegHz.

    Below are the simulation results for input and output for these frequencies:

    At 50Hz:

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    At 100Hz:

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    At 1kHz:

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    At 100kHz:

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    At 1MegHz:

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    The results are peak to peak amplitudes at the output for 1V pulse input noise at different frequencies. And here are the results for each:

    50Hz ------> 1.6mV

    100Hz -----> 3.8mV

    1kHz ------> 173uV

    100kHz ----> 41uV

    1MegHz -----> 1uV

    Here is the power dissipation for the regulator which is around 0.5W:

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    And finally here below is the current drawn from the SMPS and flow through input stage:

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    My questions are:


    How can I reduce this supply current? Apparently it is 6A. Obviously there is something wrong with this even though the filtering is fine.
    I would be glad to hear any other recommendations for this circuit. SMSP cannot handle more than 500mA or maybe 1A, so reducing C2 can be an option but that degrades the filtering. Or am I exaggerating the 1V noise?
    Last edited by doncarlosalbatros; 6th February 2019 at 13:30.

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    Re: How to make a better design for this SMPS post regulator filter circuit?

    How can I reduce this supply current? Apparently it is 6A.
    You are assuming implausible SMPS output voltage waveform and get meaningless current values in return. The voltage waveform may be ok as to test regulator operation, but why should the SMPS sink current? It actually never will.



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    Re: How to make a better design for this SMPS post regulator filter circuit?

    Hi,

    There's a lot I couldn't answer, I'm afraid. Regarding the 6A supply current, do you add internal resistance to the power supplies? Adding a little might help, especially if you're fortunate enough to know the actual source resistance of the supplies (in simulations, I just put a highly questionable 0.5R on them all due to ignorance of the realities of figuring out battery or supply resistances).



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    Re: How to make a better design for this SMPS post regulator filter circuit?

    Quote Originally Posted by FvM View Post
    You are assuming implausible SMPS output voltage waveform and get meaningless current values in return. The voltage waveform may be ok as to test regulator operation, but why should the SMPS sink current? It actually never will.
    Do you mean 1V is too much and non realistic? What value would be a good estimate?

    Do you also have any other recommendation for this circuit or component values? Do I need parallel caps for C2 to reduce ESR?
    Can the reg handle 0.5W continuous without any heat sink?

    Thnak you

    - - - Updated - - -

    Quote Originally Posted by d123 View Post
    Hi,

    There's a lot I couldn't answer, I'm afraid. Regarding the 6A supply current, do you add internal resistance to the power supplies? Adding a little might help, especially if you're fortunate enough to know the actual source resistance of the supplies (in simulations, I just put a highly questionable 0.5R on them all due to ignorance of the realities of figuring out battery or supply resistances).
    Yes R3 represents the output resistance of the supply which I chose 0.02 Ohm.


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    Re: How to make a better design for this SMPS post regulator filter circuit?

    Hi, The output impedance of an SMPS is not a constant value. It is frequency dependent.

    You can measure it by supplying a current wiggle to at the output of your SMPS and obtaining the frequency response curve of the output voltage. The maximum value is usually around the crossover frequency though.

    Even a good simulation can tell you a close value.

    Actually, you won't get Zout=20mOhm unless your SMPS is "properly" designed.
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    Re: How to make a better design for this SMPS post regulator filter circuit?

    Quote Originally Posted by Akanimo View Post
    Hi, The output impedance of an SMPS is not a constant value. It is frequency dependent.

    You can measure it by supplying a current wiggle to at the output of your SMPS and obtaining the frequency response curve of the output voltage. The maximum value is usually around the crossover frequency though.

    Even a good simulation can tell you a close value.

    Actually, you won't get Zout=20mOhm unless your SMPS is "properly" designed.
    Can you give me a realistic estimate for Zout? Is 20mOhm too big or too low?
    Is it in order of Ohms or milliohms? What could it be for min to max roughly?



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    Re: How to make a better design for this SMPS post regulator filter circuit?

    The 6A peak inductor current that you are showing us is at about 66.7 Hz. Why that frequency?
    Last edited by Akanimo; 6th February 2019 at 14:54.
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    Re: How to make a better design for this SMPS post regulator filter circuit?

    Quote Originally Posted by Akanimo View Post
    The 6A inductor current that you are showing us is at about 66.7 Hz. Why that frequency?
    Hi,
    It is just the worst case for the current for low frequency. Maybe it is not realistic.?
    It could be a 50Hz noise I thought.

    Please let me know if you think I need to change anything for the way of thinking or components.

    This is why I asked here I might have been wrong in way of modelling also design.

    I appreciate your answers.



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    Re: How to make a better design for this SMPS post regulator filter circuit?

    Because you are asking this, if you actually designed the SMPS, then I'd say estimate Zout at 250mOhm.
    -------------
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    Re: How to make a better design for this SMPS post regulator filter circuit?

    Quote Originally Posted by Akanimo View Post
    Because you are asking this, if you actually designed the SMPS, then I'd say estimate Zout at 250mOhm.
    Here is an example of SMPS datasheet I use(they dont write about Zout explicitly). Here is the datasheet of it https://docs-emea.rs-online.com/webd...6b8129224d.pdf 15V model.

    Maybe theres a way to estimate the Zout from the given parameter values but I dont know how.



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    Re: How to make a better design for this SMPS post regulator filter circuit?

    Wait, what is the current rating of the SMPS?
    -------------
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    Re: How to make a better design for this SMPS post regulator filter circuit?

    Quote Originally Posted by Akanimo View Post
    Wait, what is the current rating of the SMPS?
    This one shows for 15V model 1.34A. I also deal with ones between 500mA to 1A.



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    Re: How to make a better design for this SMPS post regulator filter circuit?

    I'm beginning to think that you should remodel the SMPS such that you can't get more than the rated output current from the SMPS.
    -------------
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    Re: How to make a better design for this SMPS post regulator filter circuit?

    Quote Originally Posted by doncarlosalbatros View Post
    How can I reduce this supply current? Apparently it is 6A. Obviously there is something wrong with this even though the filtering is fine.
    Resonance close to 100 Hz. Therefore a low impadance is presented @ 100 Hz resulting in high current.

    Current waveform presented by LTSpice @ 100Hz is expected due to resonance of the LC filter elements. My hand calculation gives me a peak current of (4*0.5/Pi)/0.121~5.26 A
    Impedance seen by the "Voltage source" @100Hz ~0.121 ohms.


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    Re: How to make a better design for this SMPS post regulator filter circuit?

    Hi CataM,
    Quote Originally Posted by CataM View Post
    Resonance close to 100 Hz. Therefore a low impadance is presented @ 100 Hz resulting in high current.
    Very much correct.
    Current waveform presented by LTSpice @ 100Hz is expected due to resonance of the LC filter elements. My hand calculation gives me a peak current of (4*0.5/Pi)/0.121~5.26 A
    Impedance seen by the "Voltage source" @100Hz ~0.121 ohms.
    Which impedance are you referring to? We were referring to the output impedance of the SMPS? How could you possibly calculate that without the SMPS inductor spec? I am sure you haven't read through these posts. The challenge here is not that LTspice is not correct. It is that the SMPS has not been appropriately modeled. You have mixed up a whole lot of things. We were not discussing the impedance that the source in the schematic is seeing but the impedance that the actual SMPS would see.

    The SMPS here is rated between 0.5A to 1A according to the OP. How do you translate that to obtaining 5.26A? 5.26A has an average value significantly higher than 1A. If this were to be the case, then the SMPS would likely become unstable.
    Last edited by Akanimo; 7th February 2019 at 02:51.
    -------------
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    Re: How to make a better design for this SMPS post regulator filter circuit?

    Hello all,

    I came across this document https://www.maximintegrated.com/en/a...dex.mvp/id/883

    The third option in document cascading two regulators. But I also saw designs using common mode chokes or ferrite beads.

    There are many topologies. Does anybody have idea in my case would be more suitable?

    My SMPSs are 12V or 24V the currents are between 500mA to 1A.

    Thanks



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    Re: How to make a better design for this SMPS post regulator filter circuit?

    Quote Originally Posted by Akanimo View Post
    Which impedance are you referring to? We were referring to the output impedance of the SMPS?
    Filter impedance, the only thing post #1's waveforms can do.

    The SMPS here is rated between 0.5A to 1A according to the OP. How do you translate that to obtaining 5.26A?
    I was only explaining the reason of the "high current" value, a meaningless value due to a meaningless SMPS model. Even with your "SMPS output impedance of 250mOhms" you will still get about 2 A peak, higher than the rating current. I do not see your point of "it is rated at 1 A". So what ? WIth the wrong load, you will burn it and that is it.. unless it is current limited.


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    Re: How to make a better design for this SMPS post regulator filter circuit?

    Quote Originally Posted by CataM View Post
    Even with your "SMPS output impedance of 250mOhms" you will still get about 2 A peak, higher than the rating current. I do not see your point of "it is rated at 1 A".
    With this I can safely conclude that you know the exact value of the OP's SMPS output impedance. Please give the OP that figure. The OP wants to use it in simulation.

    Also please help in modeling the SMPS too so the OP can get a solution and forum members can learn from it.

    Thanks in anticipation.
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    Re: How to make a better design for this SMPS post regulator filter circuit?

    With the wrong load, you will burn it and that is it.. unless it is current limited.
    The power supply of interest is Traco TML series, and of course current limited. Furthermore, output ripple is specified not to exceed 100 mVpp wideband, so the assumed 1V ripple voltage is just pointless. Low frequency ripple in the 100 Hz range will be probably below 1 mV, and as previously mentioned, you shouldn't expect the SMPS to sink current, the output rectifier can't.



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    Re: How to make a better design for this SMPS post regulator filter circuit?

    With this I can safely conclude that you know the exact value of the OP's SMPS output impedance.
    How ? Even if we knew the exact output impedance, the voltage source (notice I am not referring to the SMPS, but just to a simple voltage source i.e. it does not represent the SMPS) would still probably produce high output current due to resonance of filter and overestimated noise level (you need 200V input step to produce 1 V step at the output for his single mode SMPS). Again, the circuit OP has can test the filtering, not SMPS behavior.



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