# Voltage to current converter of high speed CDR circuit

1. ## Voltage to current converter of high speed CDR circuit

Hi guys,
I tried to reproduce a 5Ghz clock and data recovery circuit from a IEEE paper,
when I design v/i converter I found that in DC simulation the result is fine but in tran simulation have some problems. I wonder is this normal or not?
schematic of v/i converter:
M5 provides 500u A current, M0 and M1 steering the current. d1/u1 switching with 5 Ghz frequency.

dc simulation seems to be fine

something unexpected in my trans simulation

when d1 is high, m0 have ~500u current that is normal, but m12 has only 209u current which it should be same as m0, I found that the issues is the M14 gate has ~150u current leakage .

alternative question, what is the difference of v/i converter and charge pump? textbook doesn't discuss about this.
or perhaps v/i converter doesn't expect such high switching speed? or I misunderstanding the function of v/i converter(expectation from PLL/CDR's v/i converter)?
I am new to High speed circuit and PLL/CDR.

I will provide more detail as I can if my question still unclear.
Thank you.

•

2. ## Re: Voltage to current converter of high speed CDR circuit

To M0 drain you connected 2 gates: M14 and M12. How much are the Cgs of those?
With the capacitance values you can calculate the time constant of the M0 drain node, probably it will tell you why so slow is the first stage.
"Leakage" is gate charge current in your case I think, we don't call it leakage. It is natural if you want to change the Vgs of a device you have to wait some time, and 5Ghz is quite high frequency, so there are no surprises.
By the way check the behaviour with lower switch frequency too. Charge pumps in those PLLs which I saw were controlled with the divided frequency of the VCO, not with 5GHz.
Related to charge pump question difference is the purpose. There are other techniques to implement charge-pump, like with non-linear switched current pulses which is totally different than a linear V/I converter circuit. These are not comparable, of course textbooks don't discuss about.

•

3. ## Re: Voltage to current converter of high speed CDR circuit

Hi,
transient operating point of M12 and M14,

and

I discover these warning when I run the transient simulation of V/I converter, does this matter?

thanks.

•

4. ## Re: Voltage to current converter of high speed CDR circuit

Getting negative capacitance for devices indicates that you have used physically unplausible geometry parameters respectively that the model level is inappropriate for the technology.

5. ## Re: Voltage to current converter of high speed CDR circuit

You should try to save the transient operating points in steady state, not at initial condition or at signal transition. Or use DC analysis.

--[[ ]]--